The 32-bit ARC HS38 processor core IP is based on the extensible ARCv2 architecture and is optimized for embedded apps running Linux. A single HS38 core delivers up to 4,200 DMIPS at 2.2 GHz in typical 28 nm silicon while consuming less than 90 mWs and using only 0.21 mm2 of silicon area.
The HS38 MMU supports a 40-bit physical address space and page sizes up to 16 Mbytes. It is also available in dual-core and quad-core configurations and features full L1 cache coherency, plus up to 8 Mbytes of L2. An optional FPU supports single- and double-precision arithmetic. The CPU is supported by the MetaWare Development Toolkit that has an optimized C/C++ compiler and a fast instruction set simulator (ISS) for pre-hardware software development. Available now.
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