3D chips will soon be deployed in high-volume manufacturing
Intel recently announced that, for the first time since the invention of silicon transistors over 50 years ago, chips will be manufactured in high volumes using transistors that have a three-dimensional structure. The new structure will further enable chips to operate at a lower voltage and lower leakage. The plan is to introduce a revolutionary 3D transistor design called Tri-Gate (first disclosed by the company in 2002) in a 22-nm microprocessor, code-named “Ivy Bridge,” which is slated for production by the end of the year.
This image shows the vertical fins of Intel’s revolutionary Tri-Gate transistors passing through the gates.
The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered electronic devices for decades. The traditional “flat” 2D planar gate is replaced with an very thin three-dimensional silicon fin that rises up vertically from the silicon substrate. The current is controlled by implementing a gate on each of the three sides of the fin two on each side and one across the top rather than just one on top, as is the case with the 2D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the “on” state (for performance), and as close to zero as possible when it is in the “off” state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).
Since these fins are vertical in nature, transistors can be packed closer together. This will enable designers to have the ability in the future to continue growing the height of the fins to get even more performance and energy-efficiency gains.
Christina Nickolas
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