40-nm FPGAs provide up to 680 K LEs and 48 8.5-Gbit/s transceivers — Altera

40-nm FPGAs provide up to 680 K LEs and 48 8.5-Gbit/s transceivers — Altera

Well, yes, it does seem like FPGAs are always coming up with the next generation at twice the speed of the last. Ho-hum. But, the Stratix IV FPGA family has made some big gains. They are the first at a 40-nm process and they now have up to 531,200 logic elements, and up to 48 8.5-Gbit/s full-duplex transceivers. That is in the GX series. The LE series can go up to 681,100 LEs, enough to move into spaces occupied until now only by ASICs.

Altera (with foundry TSMC) has managed to keep the bias power about the same as in Stratix III, while shrinking the process and that’s quite a feat. Lowering the supply voltage to 0.9 V has put the overall power about the same. But now you can have all those 8.5 Gbit/s transceivers, all running at the same time, because they take only 165 mW each, and you can get up to 22.4 Mbits of memory, and 1,360 18 x 18 multipliers on that same chip. There is hard IP for PCI Express G1 and G2 (5.0 Gbits/s) with up to four x8 blocks.

You can also build yourself 533-MHz DDR3 memory interfaces and the devices feature programmable power technology for up to a 50% power cut. The 230K LE device will start at under $400 in production quantities.

Altera , San Jose , CA
Sales Office 408-544-7900
http://www.altera.com