The promise of higher efficiency power conversion using GaN (Gallium Nitride) high electron mobility transistors (HEMT) has been achieved with devices now in volume production. This article will describe the totem pole PFC and LLC dc/dc converter circuits that take advantage of the high-frequency switching speed, low on-state resistance (RDS(on)) and extremely low reverse-recovery charge (Qrr) of GaN HEMT switches, resulting in a combined overall efficiency exceeding 97% (see Fig. 1 ).
Fig. 1: Simplified circuit diagram for high-efficiency PFC off-line power supply
Totem pole bridgeless PFC
Figure 2 shows a totem pole bridgeless PFC topology with two fast devices (SB1 and SB2), one inductor (LB) and two low-cost, slow diodes (D1, D2). The difficulty of implementing this totem pole circuit lies in the fact that during dead-time, when both transistor switches are off, one of the body diodes is turned on to allow free-wheeling current in continuous current mode (CCM) operation. In the subsequent hard-switching event, the Qrr of the body diodes in high-voltage silicon (Si) MOSFETs could cause significant current-voltage spikes, making the circuit unstable in addition to causing high switching losses. Therefore, the key to implementing a successful totem pole PFC relies on new-generation semiconductors with simultaneously low on-resistance and low recovery charge.
Fig. 2: The totem pole PFC
GaN totem pole PFC
The industry’s first qualified 600-V GaN HEMTs on low-cost Si substrate have been introduced by Transphorm. These first-generation GaN power devices show a low on-resistance of 0.15 ohm typical and are capable of reverse conduction during dead time with a low Qrr of 54 nC, which is 20 times lower than state-of-the-art Si counterpart (see Fig. 3 ).
Fig. 3: Reverse-recovery charge test result for a Si MOSFET and a GaN HEMT with similar on resistance, showing a 20x reduction of Qrr for GaN
A GaN HEMT totem pole PFC in continuous conduction mode, focusing on minimizing conduction losses, was designed by Transphorm using a simplified schematic, as shown in Figure 1. It consists of a pair of fast GaN HEMT switches (Q1 and Q2), operating at a high pulse-width-modulation (PWM) frequency, as well as a pair of slow but very-low resistance MOSFETs (S1 and S2), operating at a much slower frequency (60Hz). The primary current path includes one fast switch and one slow switch only, with no diode drop. The function of S1 and S2 is that of a synchronized rectification. The two GaN HEMTs form a synchronized boost converter with one transistor acting as a master switch to allow energy intake by the boost inductor (LB) and another transistor as a slave switch to release energy to the dc output.
The roles of the two GaN devices interchange when the polarity of the ac input changes; therefore each transistor must be able to perform both master and slave functions. To avoid shoot through, a dead time is built in between two switching events during which both transistors are momentarily off. To allow CCM operation, the body diode of the slave transistor has to function as a free-wheeling diode to enable the inductor current to flow during dead time. The diode current, however, has to quickly reduce to zero and transition to the reverse-blocking state once the master switch turns on. This is the critical process for a totem pole PFC, which previously led to abnormal spikes, instability and the associated high-switching losses due to the high Qrr of the body diode in modern high-voltage Si MOSFETs. The low Qrr of the GaN switches overcomes this barrier.
Performance as a function of output power is shown in Fig. 4 . A peak efficiency of 99.0% is achieved at 400 W while the overall efficiency is >98.6% from 180 W to 1 kW. Efficiency is calculated as the ratio of output power vs. input power. The input power is the sum of output power plus power loss.
Fig. 4: Peak efficiency measurement of a GaN totem pole PFC with no diode drop in the current loop
High-efficiency GaN LLC dc/dc converter
The output of the totem pole PFC circuit described previously in this article has an unregulated dc voltage. In this case, a resonant LLC converter (as shown in Fig. 1) is used to produce the desired regulated dc output voltage. The LLC topology is popular due to its capability of operating at high switching frequency to achieve high power density without the penalty of incurring high levels of power loss due to the soft switching of both primary- and secondary-side devices.
However, one limitation of conventional LLC designs using Si MOSFETs is the tradeoff between dead time and magnetizing current (see Fig. 5 ). 
Fig. 5: Magnetizing current vs. deadtime
Dead time and magnetizing current serve to discharge the MOSFET’s output capacitance (Coss) in order to achieve zero-voltage switching (ZVS). The relationship between Coss and these parameters is described as follows:
The Coss in this equation is equal to the drain-to-source capacitance (CDS) in parallel with the gate-to-drain capacitance (CGD). Another spec commonly found on MOSFET datasheets is CO(tr); defined as a fixed capacitance which gives the same charging time as Coss while VDS is rising from 0 to 80% of the drain-source breakdown voltage. Since this equation assumes that IM is constant during the dead time and discharges the output capacitance as a current source, CO(tr) should be used to represent the value of Coss. Table 1 shows that GaN devices have 60% less output capacitance when compared to silicon Superjunction devices with similar on-resistance (Ron).
Table 1: Comparison of GaN and Si superjunction devices with similar Ron
Superjunction MOSFETS vs. GaN HEMTs
As shown in Fig. 6 , similar Ron Si MOSFETs and Transphorm GaN HEMTs with similar Ron values are compared in a 200 KHz, 240 W 390 V/12 V LLC dc/dc converter. For this prototype circuit an ON Semiconductor NCP1392D LLC controller was used, which has fixed 305 ns dead time. The GaN device is discharged smoothly to achieve soft switching in about 200 ns, while the Si MOSFET has a slow initial discharge and cannot fully achieve soft switching within 305 ns. This partial hard-switching of the Si MOSFETs significantly reduces the system efficiency. The discharge current, shown as “Ip” in the graphs, indicates that Si MOSFET requires higher magnetizing current than the GaN devices to discharge during the dead time, increasing the output RMS current and circulation loss.
Fig. 6: Switching waveform comparison in a LLC circuit: IPP60R190E6 vs. TPH3006PS
Using first-generation Transphorm 600-V GaN on silicon HEMTs, a prototype of a 200 kHz, 240 W 390/12 V LLC has achieved 97.2% conversion efficiency (see Fig. 7 ). And Additional refinements are expected to improve this to 97.5% and higher.
Fig. 7: Peak efficiency measurement of a GaN LLC dc/dc converter exceeds 97%
The industry drive for improved efficiency has been increasingly steadily and is nearing 100%. In 2007 the voluntary program, 80 Plus, created standards for efficiency according to the results of computer power supplies tested at different loads. The highest level, Platinum (90%, 94% and 91%), is now being replaced with Titanium which is awarded to power supplies able to reach 92% efficiency at a 20% load, 96% at a 50% load and 93% efficiency at a 100% load.
In response to the need for more efficiency, Transphorm developed 600-V GaN HEMTs that enable totem-pole PFC. Not only does this technology provide the simplest bridgeless PFC topology with the lowest component count, it can achieve peak efficiency of more than 99%. Unlike even the most advanced Si MOSFETs available, the GaN HEMTs improve efficiency for soft-switching LLC topology by reducing magnetizing current and dead time needed to achieve soft-switching.
With a 99% PFC, and a target to meet 98% efficiency for a 1-kW LLC, power management designers now have an elegant, cost-effective and very-high-efficiency solution to meet and exceed efficiency standards while also simplifying designs.
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