OL4.SEP–pm
VMEbus has high profile at Buscon/92 East
This year, the Buscon/92 East conference and exhibition is scheduled for
Boston's Hynes Convention Center from Sept. 15 to the 17. Besides being an
exhibition, the show is the platform for a technical program that runs the
gamut from high-frequency characteristics of the 2.5-mm TeleComBus
connector, to broader concerns such as the design of man/machine
interfaces for real-time systems. Although the program has impressive
breadth, depth is provided by the wealth of papers dealing with the VMEbus
and associated topics. This is deceiving in that the PC architecture is by
far the favorite of the embedded system designer–one only has to look at
the market share figures to see this. However, the strength of the VMEbus
presence has more to do with technical activity than market share. Out of
a total of around 50 papers, no less than 12 are to be presented on topics
related to VMEbus. Of these, four are from Force Computers, Campbell, CA.
An independent designer and manufacturer of VMEbus products, Force has
recently introduced a range of Sun Microsystem's Sparcstations 1- and
2-based processor boards in a VMEbus form factor. The initial offering
came in the form of the Sparc CPU-1E, based on the Sparcstation 1. This
was followed by the Sparc CPU 2S, a single-board version of Sun's
Sparcstation 2. The most recent addition to the line is the Sparc CPU-2CE,
similar to the 2S except for two SBus sockets which allow the installation
of standard, off-the-shelf SBus modules. These include graphic frame buffers
or accelerators or any of up to 300 SBus modules available from
third-party vendors. According to Tom Griffiths, product marketing
manager at Force, the reasons for the coming together of the two companies
are straightforward enough. Sun needed someone who could grow and maintain
the credibility of Sparc in the embedded environment, while Force wanted a
strong Unix platform because of the particular market pressures it faced.
The enabling factor in all this is the amount of memory that it is now
possible to place on a single-board computer (SBC). Unix requires 16
Mbytes to run, with 24 Mbytes allowing for reasonable speed. The rough
rule-of-thumb is 1 to 1.5 Mbytes for each MIPS. The CPU-2CE runs at 28.5
MIPS and can have anywhere from 16 to 64 Mbytes of on-board dynamic RAM.
All the boards come with the Solaris operating system. This is a bundling
of SunOS, Open Windows, and NIS. Force is pushing Solaris as the de facto
standard for Unix. While the 2CE board may already have an SBus
connector, this does not mean the spec has been written in stone. One of
the technical papers to be delivered by Force at the Buscon show will deal
with some of the present intricacies of the standard, as well as highlight
some proposed changes. These changes involve altering the profile spec to
allow an SBus module to be connected while still maintaining the
single-slot integrity of the board. General issues of flexibility, such as
read-modify-write, which SBus does not really deal with, will also be
addressed.
Extending the VMEbus lifespan As the industry continues to wait with
bated breath for the first Futurebus+ products to appear, a number of
extensions to present bus topologies have been proposed that will
hopefully prolong their respective life spans. With Multibus II it was the
introduction of live insertion and a faster message-passing coprocessor
(Electronic Products, March 1992, p. 15) and with the STD Bus it was the
32-bit extension, now called STD-32. For the VMEbus, VME64 and the source
synchronous block transfer (SSBLT) paradigm are expected to be the midlife
kicker. Both of these will be discussed by Force's Wayne Fischer and Jack
Regula, respectively, at the show. The spec for SSBLT, which will allow
for the transfer of data at speeds of up to 160 Mbytes/s across a VMEbus
backplane, was scheduled for presentation to VITA's Bus Architectures
Standards Working Group on August 17. From there it will be placed before
the IEEE. Force is scheduled to have a VME64 implementation of its Sparc
boards by the first quarter of 1993. The company expects the VME64/SSBLT
combination to maintain the VMEbus as a viable option over Futurebus+
until the end of the 1990s. Other midlife kickers for the VMEbus to be
discussed at Buscon include live insertion and Autobahn, the 400-Mbyte/s
data transfer proposal from PEP Modular Computers, Pittsburgh, PA
(Electronic Products, March 1992, p. 22). Confined to 3U form-factor
boards, the Autobahn routes signals at frequencies of up to 1 GHz. This has
slowed its acceptance because of the changes to the backplane that are
required to avoid interference. Despite this, PEP believes that Autobahn
will become a de facto standard long before it gets IEEE approval.
–Patrick Mannion
CAPTION:
The Sparc CPU-2CE is the third of a family of three Sparc-based VMEbus
boards from Force Computers. Along with the Sparc RISC processor, the
board has 16 to 64 Mbytes of DRAM, a 4.2-MFLOPS coprocessor, a variety of
interface ports, and two SBus connectors for modular additions.
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