FPGA design kit is low in cost
The Check Out Your Design kit allows an engineer to enter a design using
the Data I/O ECS Windows-based schematic editor and to place and route the
result in a Quicklogic FPGA. The kit includes both the ECS schematic
capture package and the company�s SpDE tools, which include a logic
optimizer, timing-driven place and route, a delay modeler, a path timing
analyzer, and a physical viewer. ($99–available now.) Quicklogic Corp.,
Santa Clara, CA Information 800-842-3742 Fax 408-987-2012
2050
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