Microprocessor developments
advance on several fronts
This year's Microprocessor Forum, held last month in San Jose, CA, showed a
landscape changed in some ways from last year, although many trends continued.
Continuity appeared in the form of ever-faster high-end processors from Digital
Semiconductor (Hudson, MA) and Hewlett-Packard Co. (Fort Collins, CO). Change
http://electronicproducts.com/ShowPage1.asp?SECTION=&PRIMID=&FileName=OL1.NOV1996>Electronic Products, Nov. 1996,
p. 19), as well as the appearance of a new microprocessor vendor entering both
the Mips and PowerPC midrange markets.
Another discontinuity was Digital Semiconductor's announcement that its x86
emulation software had advanced so an Alpha-based Windows NT workstation could
run x86 NT integer applications faster than the fastest current Pentium Pro
system. The emulation announcement was for FX!32, software that ships with all
Alpha NT 4.0 systems, and is available free from Digital's World Wide Web site.
FX!32 runs about 46% faster than a 200-MHz Pentium Pro on the integer portion
of the Byte Windows NT benchmark and about 20% slower on the floating-point
portion. FX!32 compiles clean parts of the x86 code into native Alpha routines
on its first few runs of a new application, and stores them as calls.
Really dirty code–self-modifying, for instance–must still be emulated. But,
with several passes, nearly everything can be converted. Thus, the application
will run progressively faster until it is optimized to the extent that FX!32 is
capable.
Along with FX!32, Digital Semiconductor announced the co-development (with
Mitsubishi) of a lower-cost Alpha 21164 microprocessor, the 21164PC, which
eliminates the on-chip level-2 cache and adds multimedia-specific
instructions. The new instructions will appear in all future Alpha
implementations. They all affect the integer unit only, and none of them
lengthen any pipeline stage delay. They increase the die area of the 21164 by
only 0.6%.
The chips should be available midyear from both companies, at a price,
according to the company, that will bring an Alpha workstation under $2,500,
including 2 Mbytes of synchronous SRAM cache.
Parent Digital Equipment's previous NT road maps showed it offering servers and
workstations whose performance was beyond the reach of Intel-based machines,
but not competing directly in the PC market. This, on the other hand, appears
to be a beard-the-lion effort. The company's PCI chipsets, along with the 2
Mbytes of cache, will be the only elements not found in an Intel-based NT
workstation.
At the Forum, Digital Semiconductor also described the next-generation Alpha,
the 21264 (see diagram ), which it will present at the Integrated Solid-State
Circuits Conference in February 1997. Running at 600 MHz, it represents
Digital's first foray into superscalar architecture with out-of-order
execution, with four integer execution units and two floating-point units. The
company expects to sample the chip in the first quarter, and ship in volume in
the second half of 1997.
The 21264 is notable for internal storage as well as bandwidth. Two integer
register files of 80 registers each and a floating-point file of 72 registers
complement separate instruction issue queues. The lot accommodates 80
instructions along with 32 loads and 32 stores in the pipeline at the same
time.
Memory bandwidth reaches 5.3 Gbytes/s through 2-V HSTL ports. Digital
Semiconductor projects Spec95 numbers over 30 for integer and over 50 for
floating-point benchmarks, at 500 MHz. This performance is for the initial
parts in 0.35-micron lithography.
Power2 reduces the company's previous 8-chip module to a single
15-million-transistor die. It is shipping now and achieves Spec95 15.4 and 17.5
at 135 MHz for integer and floats, respectively.
HP's currently shipping PA8000, in 0.5-�m technology, achieves 10.8 and 18.3
Spec95 base numbers. Its 8200, coming midyear, has improvements in memory
architecture that should give it a solid boost.
Quantum Effect Design (Santa Clara, CA) made a name as a design house with the
R4600 and R5000–notably small and simple Mips implementations that became
standard in the Indy, Silicon Graphics Inc.(Mountain View, CA)'s low-end
workstation. At the forum, the company announced its metamorphosis into a
fabless semiconductor company, offering microprocessors to the embedded market.
Its first product, the RM7000, is a Mips IV ISA implementation aimed at
high-end embedded products, such as page printers. The company also described
the 603q, a PowerPC design aimed at high-end embedded and low-end desktop
applications.
The initial 603q runs at 160 MHz in a 0.5-micron process, achieving performance
comparable to a 120-MHz 603e, with a much simpler single-issue five-stage
pipeline. Its multiplexed address/data bus is similar to that of the 602.
The RM7000 is the most elaborate design yet from QED. It will be produced by an
unnamed foundry at 0.25-�m and fit on 80 mm2 of silicon, slightly smaller than
the simpler but coarser R5000. The RM7000 includes 16-Kbyte
four-way-set-associative instruction and data caches, and a 256-Kbyte secondary
cache, also four-way set associative. All caches have 32-byte lines.
Aside from caches, the chip retains the company's trademark simplicity. The
dual-issue pipeline avoids anything that might involve long signal paths. So
much of the chip is occupied by memory that the company says, “buy the cache,
the processor is free.” The RM7000 should be available sometime in 1997.
— Rodney Myrvaagnes
CAPTION:
The Alpha 21264 has over 15 million transistors, a four-issue integer pipeline,
and two-issue floating-point pipeline.
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