Multimedia ICs strive
for adaptability
Requirements are still unsettled,
so programmability is important for reasonable product life
BY RODNEY MYRVAAGNES
Associate Editor
Multimedia capability of some sort is de rigueur for new home
computers, and is increasingly finding use in business applications as
well. For anything beyond entry level, it imposes processing demands beyond
the unaided capacity of current microprocessors, necessitating specialized
ICs.
Multimedia is a catchall term meaning, roughly, the coordination of
sound, video streams, and computer graphics. This capability is used in
computers for games, video-conferencing, presentations, and playback of
digital video disks (DVDs). Many of the same demands apply to digital video
broadcast and fancy Web browsing, so set-top boxes may also be target markets.
In PCs, the MMX extensions to the most recent x86 processor instruction
sets allow some multimedia functions to migrate to software, in the form
of device drivers and DLL files. Some ICs, especially those aimed at consumer
PCs, attempt to take this migration into account and perform the parts
of an operation that are least suited to MMX.
Programmable media processors
The TM-1000 Trimedia processor from Philips Semiconductors (Sunnyvale,
CA) is a very-long-instruction-word (VLIW) machine with five independent
execution units. The processor (seeFig. 1 ) is the first of a family
aimed at accelerating all of the multimedia tasks, without hardware commitment
to any single standard.
Fig 1. The Philips Trimedia is a VLIW
processor, whose compiler schedules
multiple execution units.
In contrast with superscalar processors, VLIW machines depend on a compiler
to schedule nonconflicting operations. The C/C++ compiler for Trimedia
is the outgrowth of a decade of VLIW research at Philips. It is central
to the company's efforts at finding users.
The TriMedia Software Development Environment is an integrated suite
of C and C++ tools for the TriMedia VLIW multimedia processor. It includes
a compiler, a debugger, and performance analysis/enhancement tools, as
well as a software simulator. Application libraries include code for MPEG
video compression/decompression, modem operation, sound synthesis, and
AC-3 MPEG surround-sound encoding. A single-seat license costs $15,000.
In addition to the execution units, the TM-1000 has multiple DMA controllers,
a glueless SDRAM interface, and a glueless PCI interface. MPEG 1 decompression
occupies about 22% of the TM-1000's cycles. The device has been sampling
for several months and will be in production by midyear for under $50 each
in large quantities.
Comparable in function to the TM-1000, the Mpact 2 Media processor from
Chromatic Research can provide concurrent operation among all seven multimedia
functions on a single add-in card. Data moves over five I/O buses at up
to 500 Mbytes/s. The device has a direct interface to Rambus RDRAMs, and
it comes in a 240-pin TQFP.
Chromatic has licensed the production of its design to three silicon
partners: SGS-Thomson (Lincoln, MA), Toshiba America Electronic Components
(Irvine, CA), and LG Semicon (San Jose, CA). Unlike the Trimedia effort,
Chromatic reserves the complexities of programming the chip to itself,
developing X86 functions that run proprietary code in the Mpact.
Users of the chip must license whatever code they need from Chromatic.
A company that produces a DVD player will license only DVD code. Another
making a multimedia PC motherboard will license all multimedia functions.
Chromatic expects a royalty stream that will enable it to program new functions
as standards evolve, and to develop later generations of the chip.
Limited sampling of Mpact 2 is currently going on, as is development
of a faster Mpact 3. The current chip claims a peak of 6 GOPS when all
execution units are filled. Production chips will be under $50 each in
large quantities, and Toshiba offers samples at $75 each now.
DSP combination chips for multimedia
The TMS320AV7000 series from Texas Instruments (Dallas, TX) combines
DSP capability with an ARM7T (Thumb) processor core. It includes all the
functions for digital video broadcast (DVB) in the AV7110 or digital satellite
service (DSS) in the AV7100. These include decrypting, decoding, display,
decompression of both audio and video, and NTSC/PAL video encoding.
The chips also combine the memory requirements for all functions into
a single 16-Mbit synchronous DRAM. The AV7100 includes an IEEE 1394 digital
data port, and its transport demultiplexer, conditional access, and decryption
are optimized for DSS.
The AV7110 has a DVB-optimized transport demultiplexer. It also has
the flexibility to externally support the multiple conditional-access and
decryption methods of different service providers. Support tools and libraries
are available from Texas Instruments and third-party suppliers. The chips
are sampling now and will be in production this summer at less than $45
each in lots of 100,000.
Hitachi America (Brisbane, CA) has combined a 16-bit fixed-point digital
signal processor with its SuperH 32-bit microprocessor core in the SH-DSP
(seeFig. 2 ). There is a single instruction stream, and the parts
share silicon. This makes development and debugging easier, at some cost
in overlapped operation. The combination is said to closely fit the real-life
requirements of a GSM mobile handset. The device runs code for earlier
SH-1 and SH-2 devices, but adds 92 DSP instructions.
Fig. 2. The Hitachi SH-DSP combines a 16-bit
integer DSP core with a SuperH microprocessor.
Development tools are available from Green Hills Software (Santa Barbara,
CA), Cardtools (Sunnyvale, CA), and Hitachi. Unsupported DSP libraries
are available free. The part comes in a 176-pin QFP. The production device,
with 48 Kbytes of mask ROM and 8 Kbytes of RAM, will be available in the
third quarter for $25 each in lots of 10,000. Evaluation devices are available
now, with 48 Kbytes of RAM replacing the ROM.
Analog Devices (Norwood, MA) offers a plastic-packaged version of its
SHARC DSP chip, the ADSP-21061 (seeFig. 3 ), aimed at low-cost markets
with a reduced on-chip memory. It features 1 Mbit of dual-port SRAM.
Fig. 3. The ADSP-21061 from Analog Devices
combines a floating-point DSP core with a 1-Mbit
dual-port SRAM in a plastic package.
Other features include six DMA channels and a pair of serial ports with
total capacity of 240 Mbytes/s. The company offers a $179 development kit–called
EZ-Kit Lite–that includes an ADSP-21061-based board, C compiler with numerical
C extensions, code compactor, assembler, linker, loader, instruction-level
simulator, and runtime library. Packaged in a 240-pin PQFP, the part costs
$49 each in lots of 10,000, and is available now.
Flat-panel multimedia
The 65555 HiQVPro graphics accelerator (seeFig. 4 ) and the 68554
HiQVision mobile/desktop multimedia accelerator (seeFig. 5 ) both
incorporate Chips and Technologies' (San Jose, CA) HiQColor technology,
which is based on proprietary temporal modulated energy distribution (TMED)
algorithms. TMED enhances the image quality of passive STN panels by bringing
their color range close to active TFT panels of the same resolution, while
eliminating shimmer, Mach banding, and other motion artifacts. From straight
on, it makes an STN panel look very much like a TFT panel.
Fig. 4. The Chips and Technologies 65555
is a graphics accelerator specific to
flat-panel displays.
Fig 5. The 68554 multimedia accelerator
from Chips and Technologies can run a
remote flat-panel display.
The 68554 multimedia accelerator aims at desktop as well as notebook
computers with any kind of flat-panel display. It incorporates a PanelLink
transmitter that drives remote flat-panel displays over several meters
of copper or hundreds of meters of optical fiber.
The chip handles displays up to 1,024 x 768 pixels with 24-bit color.
It also handles nonstandard displays, such as those with a 16:9 aspect
ratio. The 65554 is $38.80 each in lots of 10,000, and samples are available
now. The 65555 costs $40 each in lots of 10,000, and samples are available
now.
MMX accelerator
The Riva 128 (seeFig. 6 ), from Nvidia (Sunnyvale, CA) and SGS-Thomson
(Lincoln, MA), supports Intel's (Santa Clara, CA) Visual Computing Initiative,
providing 3-D, 2-D, video, and imaging capabilities to MMX-based desktop
PCs.
Fig. 6. The Riva 128 processor from Nvidia
and SGS-Thomson offloads multimedia
operations from Intel MMX processors.
It incorporates a 5-GFLOPS floating-point setup engine to offload 3-D
processing from the host, resulting in significantly higher frame rates
and increased realism. The chip can process up to 5 million triangles/s.
A massively parallel pixel processor can sustain 15 billion pixel operations/s,
delivering 100 million rendered pixels/s, permitting complete- ly fluid
animation. The chip uses a 128-bit pipeline and couples to 100-MHz SGRAMs
for a memory bandwidth of 1.6 Gbytes/s. The part comes in a 300-pin plastic
BGA. It is in volume production, and costs $30 each in lots of 10,000.
Recent 3-D accelerators
The PCX2 3-D graphics accelerator from NEC (Santa Clara, CA) is said
to outperform the S3 Virge by 10 to 20 times on Microsoft Direct3D benchmarks.
Among features not always found are real shadows cast from any object over
any surface, 32-bit-equivalent Z-buffer, pixel-perfect hidden-surface removal,
and anti-aliased textures.
In addition, smooth shading does not change when rotated, and translucency
can be applied to whole objects. The chip is pin-and-software compatible
with the previous PCX1. It is sampling now in a 208-pin PQFP and will be
in production by summer at $35 each in lots of 10,000.
A pair of 3-D accelerators from Tritech Microelectronics (Milpitas,
CA), the Pyramid3D (seeFig. 7 ) comes with (TR25201) and without
(TR25202) a geometry engine. Both chips use a tightly coupled internal
pipeline that has minimal dependence on either the host CPU or system bus.
Fig. 7. The Pyramid3D graphics accelerator
from Tritech Microelectronics has an optional
geometry engine in its complete version.
The Pyramid3D integrates programmable pixel and geometry processors
along with a primitive processor to deliver 1 million triangles/s. Designers
can implement radiosity texturing, bump mapping, Phong and Gouraud shading,
optional Z-buffering, edge anti-aliasing, specular intensity, multiple
textures, and other effects at up to 50 million pixels/s.
A full 3-D graphics system based on Pyramid3D needs only a pair of 256-K
x 32-bit EDO DRAMs, SDRAMs, or SGRAMs, and a masked ROM. The parts come
in 304-pin thermally enhanced BGAs. The TR25202 is $50 each in lots of
10,000; the TR25201 is $70 each in lots of 10,000, and samples are available.
An evaluation kit costs $499 and is available now.
For more information on products described in this article,
contact the following companies:
Analog Devices 300
Norwood, MA
Hotline 800-262-5643
Chips and Technologies 301
San Jose, CA
Lisa Lawrence 408-434-0600
Chromatic Research 302
Sunnyvale, CA
Hotline 408-752-9100
Hitachi America 303
Brisbane, CA
Literature (PMH1DPR001P2)
800-285-1601, ext. 27
LG Semicon 304
San Jose, CA
Arun Kamat 408-432-5000
Nvidia 305
Sunnyvale, CA
Mike Hara 408-617-4011
Philips Semiconductors 306
Sunnyvale, CA
Trimedia Product Group 408-991-3838
SGS-Thomson
Microelectronics 307
Lincoln, MA
Inquiry Response 617-259-0300
Texas Instruments 308
Dallas, TX
Semiconductor Group (SC-96054)
800-477-8924, ext. 4500
Toshiba America
Electronic Components 309
Irvine, CA
Annette Birkett 714-455-2298
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