Ultrathin silicon boosts CMOS

to gigahertz speeds

Peregrine Semiconductor (San Diego, CA) has developed a variant of silicon-on-sapphire
(SOS) semiconductor processing that allows it to make commercial CMOS products
with gigahertz-RF and digital logic mixed. A fractional combination prescaler
and phase-locked loop (PLL), the company's first product, specifies a 1.1-GHz
input frequency.

The process, called ultrathin silicon (UTSi), is geared to standard
wafer-fab equipment and procedures that make it possible for a fabless
company to acquire a fabrication partner without meeting or making impossible
demands. The process begins when the company buys SOS wafers, like those
used to make semiconductors for satellites. These come riddled with defects
in the epitaxially grown silicon layer that would normally reduce yields
well below commercially acceptable levels.

The company treats the wafers with an ion-implantation step, followed
by annealing, to produce a much more uniform silicon layer that can be
less than 1,000 Å thick. At this stage, the wafer is transparent,
like a sapphire watch crystal, with a slight interference color from the
silicon film.

Since wafer-handling machinery commonly uses optical detectors to tell
if a wafer is in the carrier, the wafer must be made opaque. Consequently,
it is coated with polysilicon before being sent to the Asahi Kasei wafer
fab.

The fab can now treat the wafer just like one made of silicon (although
it is less fragile). The current parts are made at an antique (for digital
CMOS) 0.8-µm-drawn feature size, but test wafers have shown no problem
migrating to 0.5 and 0.35 µm. The chips have one poly and three metal
layers.

The process retains the normally valuable features of SOI/SOS semiconductor
chips–low capacitance, substrate isolation, low-voltage operation, natural
RAD-hardness, and cross-talk reduction. And, it offers GaAs-like speeds
at low voltage.

The initial part, the PE3282 pre- scaler/PLL, is a pin and function
replacement for the similar National part (see diagram ). It carries
RF, fast digital, and charge-pump circuitry on a die small enough for a
tiny 20-pin TSSOP. It also handles 1.1-GHz RF and 510-MHz IF in its two
sections. Speed grades up to 1.8 GHz are planned.

This dual prescaler/PLL circuit combines RF circuitry, digital logic,
and charge pumps in one small SOS chip.

The part draws 7.5 mA at 3 V. Production will start in the third quarter
at $2.50 each in lots of 100,000. For more information, call Jon Siann
of Peregrine at 619-455-0660, visit http://www.peregrine-semi.com, or circle
474.