ICs bring new VESA Plug and
Display standard to reality

The San Jose, CA-based Video Electronics Standards Association (VESA) has adopted and announced its “Plug and Display” (P&D) standard, which includes a new plug design to accommodate every signal interface anybody could think of. One of these interfaces is the PanelLink technology of Silicon Image (Cupertino, CA), currently offered under license by Chips and Technologies (San Jose, CA) (see Electronic Products , July 1996, p. 65). Silicon Image is now offering its own interface chips as well.

The P&D plug design specifies pins for the Universal Serial Bus, IEEE 1394, analog video, Display Data Channel (DDS2), and Transition Minimized Display Signaling (TDMS), a VESA name for the PanelLink. The VESA standard requires support for hot plugging and unplugging.

TDMS allows data to be sent to flat-panel displays in digital form, without analog conversion at either end. TDMS consists of separate, but commonly clocked high-speed serial links for RGB.

By serializing the colors, it keeps the same pin connections for increasing screen resolutions, requiring only pixel-clock increases for increased resolution. Its slew-controlled signals can be sent 10 m over copper twisted-pair cables, and 500 m over optical fiber. Three-times oversampling with a digital PLL at the receiver end resynchronizes the signals after any skew.

Sampling now, the SiI140 and '141 transmitter and receiver (see diagram ) are the company's first pair to support hot plugging. Its frequency ranges from 25 to 85 MHz, allowing fast-refresh XGA, but not SXGA. The parts are packaged in 64- or 80-pin TQFPs and will be in production next month for $14 each in lots of 10,000.

The PanelLink SiI140 transmitter and SiI141 receiver make multiple
generations of flat-panel displays compatible.

Silicon Image has also scaled its TDMS to a pixel clock rate of 112 MHz, enough to drive SXGA (1,280 x 1,024 pixels) with 16.7 million colors. The company plans to offer samples of its SiI150 transmitter and SiI151 receiver in the fourth quarter. The chips will be able to run at 56 MHz when driving XGA panels.

The company has also attacked a second scalability front with its SiI201 programmable flat-panel controller, the first of a planned series. Current notebook vendors must design ASICs to drive their display of choice, through edge drivers that are fitted to the particular make of panel. The '201 replaces the ASIC and the driver intelligence with a programmable circuit.

The chip supports SVGA and XGA with 65-MHz operation. It is programmable for different column-driver architectures and panel timings. It can detect loss of synchronization and protect the panel from consequent damage, and it supports software controlled panel mirroring, for overhead projectors and reversed screen displays.

The chip incorporates the PanelLink receiver as well. The SiI201 is available this month for $9 ea/10,000. For more information about Silicon Image products, call Brian Underwood at 408-873-3111, e-mail , or visit age.com .