Choosing the right Ethernet switching chip

Fig. 1. An Ethernet chipset should be flexible enough to support
popular switch configurations, such as this typical client/server application
for a desktop Ethernet switch.

BY LOUIS PENGUE
PMC-Sierra
Beaverton, OR

Switched-Ethernet networking has established itself as the preferred LAN topology within just a few short years. In conventional 10-Mbit/s Ethernet, connected nodes contend for bandwidth over a single shared communications channel, creating network congestion.

Ethernet switching alleviates this problem by providing a dedicated channel for the two communicating nodes. In doing so, it delivers full line speed for all connections. As an added benefit, switched Ethernet offers a cost-effective migration path to higher-speed networking technologies such as 100Base-T, FDDI, and ATM.

Implementing switched Ethernet

To implement switched-Ethernet designs, IC manufacturers have integrated a variety of communications functions. A switching chip may include a media access control (MAC) layer, buffer FIFOs, a high-speed DMA engine for fast data-packet transfers, a local-memory interface for external buffer memory, and a backplane for modular expansion. In addition, a switch processor or RISC CPU can be embedded in the chip to provide intelligence and to implement switching and bridging functions.

Switching ICs are available from several vendors and are offered in a number of functional configurations. When selecting among these devices, the designer should focus on two critical factors. Foremost is the issue of hardware versus firmware.

Hardware-based switching chips have their functionality cast in gates, which limits the user to those particular switching functions. In contrast, firmware-based ICs can be altered in any number of ways, allowing users to create product differentiation and still support proprietary features that were initially implemented in hardware.

An Ethernet switch chipset should be flexible enough to support the most popular switch-configuration requirements. For example, in workgroup and desktop applications, the most common designs consist of 8 to 24 10-Mbit/s ports with one to two 100-Mbit/s uplinks (see Fig. 1 ).

The second key feature is cost. Virtually all network-systems manufacturers stress the importance of price when selecting off-the-shelf Ethernet switching chips for next-generation workstation and workgroup server designs. Today, the bill-of-materials cost per port for a standard switch in production is about $12 for 10 Mbits/s and about $50 for 100 Mbits/s.

Embedded CPUs: two levels of support

In a firmware-driven chip architecture, the embedded CPU performs two levels of support in addition to the basic switching operations. The first level provides a self-contained, fully managed switch. It runs a full-featured management agent that includes a simple network management protocol (SNMP) for communication information between network management systems and agents, a spanning-tree bridge, and remote monitoring (RMON). These background tasks are self-contained and run on the embedded CPU.

Ethernet switching chips without the embedded CPU must rely on an off-chip standard CPU to perform these management functions–provided that the hardware can support these functions. In so doing, the user incurs the additional cost of the CPU chip and associated design-in engineering time and resources.

The second level provided by the embedded CPU is custom support with new functionality running in real time on the operating system. This level of customization provides product differentiation to users. Moreover, the user is given the ability to perform data manipulation down to the packet level from within the switch's datapath.

In support of this capability, the embedded CPU has access to each data packet going to any MAC address. This enables fast-forwarding and filtering decisions to be made based on data in the MAC address.

The embedded CPU alone can also perform data manipulation on each data packet. This feature allows the user to perform custom forwarding and filtering functions, which are the basis for virtual local area networks (VLANs), management information base (MIB), and other special functions. Users are learning that differentiating features like these are vital for maintaining a technical and cost-competitive edge in a burgeoning Ethernet switch market.

A third area of real-time tasks includes functions that are most often executed in hardware. But in a firmware-controlled Ethernet switch chip, the embedded CPU operates the real-time firmware that implements such fundamental switching operations as 10/100-Mbit/s auto-negotiation and the MAC-layer function.

Firmware changes and customization

Since new network standards are continually being developed and existing ones change, it is important that the user be able to cost-effectively change switching functionality in firmware. IEEE 802.1Q, a proposed standard for VLAN, serves as an example.

Using a hardware-defined switch chip to implement a special function like VLAN means future changes will require a chip redesign and refabrication to meet the final requirements of IEEE 802.1Q. Such changes may require weeks of expensive redesign. Conversely, firmware changes or additions can be performed in a matter of days at little cost.

Firmware plays a major role in customization as well. For example, SNMP is a background task that can be customized.

SNMP contains three parts: structure of management information (SMI), MIB, and the protocol itself. SMI and MIB define and store managed entities, while SNMP conveys information to and from those entities. The MIB defines objects to be implemented by managed nodes. An MIB object specifies a piece of information that can be accessed by the SNMP agent on a managed node.

The SMI and the protocol are encapsulated within the “SNMP agent” and are typically standardized and uniform across implementations. The MIB, however, can be customized or modified using an MIB compiler.

Like SNMP, RMON is a background task that is well supported by the embedded CPU. RMON permits a system administrator to obtain a view into the traffic being carried on a LAN segment, typically in the form of statistics and history information on Ethernet packets received or transmitted on a port, or exchanged between two entities.

This function is becoming vital as LANs become progressively more fragmented and limit the visibility of the network to the network manager. It is desirable for Ethernet switches to support some form of RMON. However, because of the extreme processing requirements of the RMON standard, most switches only support basic port-level monitoring (commonly called “RMON-Lite”).

Fig. 2. Both the PM3350 eight-port 10-Mbit/s Ethernet switch chip
and the PM3351 one-port 10/100-Mbit/s Fast Ethernet switch from PMC-Sierra
include an embedded RISC CPU to implement switching and bridging functions.

In Ethernet switching chips like PMC-Sierra's PM3350 and PM3351 (see Fig. 2 ), the embedded CPU allows the implementation of both port-level and advanced host-level traffic monitoring. This allows network administrators to isolate problems to specific ports, and then go beyond to localize them to particular users or host computers.