Microprocessor core architecture
goes head-to-head with ARM

Motorola Semiconductor (Phoenix, AZ) has launched an entirely new 32-bit microprocessor architecture into the ASIC market, called M-Core, that emphasizes low-power requirements and small core size. The company is bucking the tide of licensing agreements for ARM7, which caters to the same market requirements. It is not unusual for Motorola to go it alone architecturally, but the company has announced plans to license its architecture to outside chip companies, which it has rarely done.

M-Core uses 16-bit op codes, although it is a 32-bit load-store device, and has 32 general registers in two files in addition to 13 control registers (see diagram ). A single program only sees 16 registers, so an op code needs only 4 bits to designate each register it will use.

The M-Core 32-bit microprocessor architecture uses 16-bit instructions
to condense code, with two 16-register files alternately available to code.

The second register file can be flipped into place without affecting the contents of either register file. Besides saving op-code bits, this arrangement makes one fast context switch available, without having to save registers to memory.

The bulk of instructions execute in one clock cycle. Load, store, and several conditional branches take two cycles. Indirect jumps and returns take three, and multiple-register loads and stores take n + 1 for n registers. Multiply and divide operations depend on the length of the operands.

At 3.3 V, the M-Core uses less than 1.4 mW/MHz, significantly lower than current ARM Thumb implementations. M-Core can run on 1.8 V, where its consumption then drops to 0.4 mW/MHz.

The first production part to be based on M-Core will be a 2.0-V dual-core cellular baseband processor, with the company's 56000 DSP core, ROM, RAM, and I/O cells, in addition to the M-Core. Next will be the Powerstrike 1, a microcontroller aimed at handheld computers, GPS receivers, and cameras. In the third quarter, the company plans an industrial microcontroller for motor control and robotics.

A C/C++ compiler is already available, as is a simulator. An evaluation board, using an evaluation chip with 32-bit address and data buses, is available from Motorola for an initial price of $499. Real-time operating system support will be coming soon. For more information, call Motorola Semiconductor's M-Core hotline at 800-765-7795, ext. 605.