Mesh Fabric Reference Design Application Note

Mesh Fabric Reference Design Application Note

Mesh switch fabrics are becoming popular with the emergence of inexpensive, high-speed serializers/deserializers (SERDES) as well as FPGA devices with embedded SERDES blocks. This document describes an implementation of a mesh switch fabric using Xilinx Virtex-II Pro devices.

This reference design supports all device sizes from an XC2VP4 upward. All SERDES blocks in each device can be used to implement switch ports, although not all SERDES blocks need to be used if a custom application requires some available SERDES blocks for other functions. Devices can be cascaded to implement more switch ports.

The configuration image for each device in the chain is identical (presuming all devices in the chain are the same). Different size devices can be cascaded with the obvious requirement of a unique image per device type. The last device in a cascade can have a different configuration from the other devices because its cascade pins are not used. Alternatively, if the last device has the same configuration, its pins must be handled appropriately on the board (tied off or left open).