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Interconnect technology challenges tradition

Interconnect technology challenges tradition

Pin-shaped contacts promise profile, pitch, and performance improvements for next-gen products

The µPILR interconnect platform from packaging developer Tessera (San Jose, CA) uses low-profile, pin-shaped contacts able to replace conventional technologies such as solder balls on semiconductor packages and plated vias in package substrates and PCBs. As industry demands expose the limitations of current interconnect technologies, the µPILR platform promises dramatic improvements in profile, pitch, performance, and reliability for next-generation mobile, computing, and consumer products.

Interconnect technology challenges tradition

Two four-layer stacks with drastically different profiles: Tessera’s 0.8-mm µPILR (on the left) is compared with the company’s own standard BGA package.

The first implementation is an advanced chip-packaging concept that can accommodate small dies with a low I/O count as well as large dies with high I/O counts. Single- and multi-chip, as well as layered-package, configurations will be offered.

Tessera recently demonstrated the technology in a 16-Gbyte USB drive featuring two 8-Gbyte NAND flash die per layer in four stacked layers. The total height was less than 1.2 mm with a 0.5-mm pitch.

Pins constructed with µPILR technology can be formed directly onto substrates are typically nickel/gold plated copper, and range from 25 to 175 µm in height and 40 to 200 µm in pin tip diameter. Solder balls are typically 350 to 450 µm high. In die-to-package substrate applications, contact pitches down to 100 µm are possible; in package-to-PCB applications, pitches lower than 0.3 mm can be achieved; and within package substrates pitches of 150 µm or lower are possible.

Thermal performance is improved due to the large number of solid vias connecting multilayer metal in substrate and a solid copper pad directly under die. Improvements in electrical performance are attributed to the use of solid vias, smaller packages dimension due to finer pitch, and higher pin counts for better power and ground integrity.

The technology also features a unique test setup that can eliminate test/burn-in sockets. For more information, visit http://www.tessera.com.

Ralph Raiola

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