Chip speeds interprocessor communication in high-end handsets

Chip speeds interprocessor communication in high-end handsets

Address-data multiplexed interconnect reduces power usage by up to 90%

By providing a fast interconnect between baseband and application processors, the Mobile Multimedia Interconnect (M2I) chip yields faster transfer of ever-larger multimedia data in high-end handsets. The device is up to six times faster than dual-port RAM interfaces, with 90% less battery drain.

The 70P9268 M2I chip is designed to work with application and baseband processors that use an address-data mux (ADM) interface and gives 800 Mbits/s through-put per port using a synchronous clocking scheme with an internal counter that eliminates the necessity for multiple addressing.

The 6 x 6-mm part works on a 1.8-V core voltage with 15-mA operating and 2-mA standby currents. The M2I also deploys eight dynamically programmable I/Os that the processor can use to control and/or monitor other devices, enabling the handset designer to add more differentiating functionality. ($3 ea/10,000samples available now, prod qty 3rd qtr.)

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