The Libero integrated design environment version 8.0 supports all Actel FPGAs and reduces development time with a new design-entry capability that enables design at a higher level of abstraction. The tool lets users visually create and automatically abstract block-based system designs into synthesis-ready VHDL or Verilog components and supports prefabricated blocks from IP libraries.
It also supports custom blocks created in HDL or Synplify DSP and processor subsystems created with CoreConsole. The tool is available for Windows and Linux platforms. (Limited edition, free; standard edition, 1-year license, $2,495available now.)
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