Transistor technology allows lower-cost 45-nm process

Transistor technology allows lower-cost 45-nm process

Renesas Technology (Tokyo, Japan) announced a high-performance transistor technology with low-cost fabrication capability for microprocessors and SoC devices of the 45-nm generation and beyond. The technology, which improves the performance of a complementary metal insulator semiconductor (CMIS) transistor with a developed hybrid structure, features a p-type transistor (two-layer gate structure) with a titanium nitride metal gate and an n-type transistor with a conventional polysilicon gate. The hybrid structure applies strained-silicon manufacturing techniques to boost current drive capability.

Testing performed on an experimental chip containing transistors with a 40-nm gate length featured a drive performance of 1,068 µA/µm for the n-type transistor and 555 µA/µm for the p-type transistor at a supply of 1.2 V. The company says that these innovations produce about a 20% performance improvement compared to the company’s previous hybrid structure and that the new structure can be fabricated at low cost because it requires no major changes to the current-generation manufacturing process.

For additional information, call Yoshinobu Sato in Japan at 011-81-3-6250-5554 or e-mail
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Christina Nickolas