Parameter extraction targets HV CMOS

The HVMOS extraction package, for use with Agilent’s Integrated Circuit Characterization and Analysis Program (IC-CAP) software platform, enables engineers to model HV CMOS devices using Synopsys’ HSPICE simulator, HVMOS Level 66 compact model.

The HVMOS model includes all relevant physical effects unique to high-voltage operation, including symmetric and asymmetric source and drain resistances, quasi-saturation, transconductance fall off at high-gate voltage, and self-heating effects. (Free to existing Agilent IC-CAP and Synopsys HSPICE customers under regular support—available now.)

Agilent Technologies , Santa Clara , CA
Janet Smith 970-679-5397

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