Actel Ices Competition With New Low-Power, I/O-Optimized FPGA Family

Actel Ices Competition With New Low-Power, I/O-Optimized FPGA Family

IGLOO PLUS Family Delivers Industry’s Best Power, Area, Logic and Features per I/O

MOUNTAIN VIEW, Calif., March 17, 2008 — Broadening its extensive portfolio of low-power programmable solutions for power-conscious designs, Actel Corporation (Nasdaq: ACTL) today introduced IGLOO® PLUS, a new family of low-power field-programmable gate arrays (FPGAs) with the industry’s best power-, area-, logic- and feature-per-I/O ratios in a programmable device. The new 5 microwatt (5µW) I/O-optimized IGLOO PLUS family also offers up to 64 percent more I/Os than the company’s award-winning IGLOO family and supports independent Schmitt Trigger inputs, hot swapping and Flash*Freeze bus hold. The low-power consumption and I/O optimization of the IGLOO PLUS family makes it an ideal solution for portable electronics in consumer, industrial, communications, medical and test applications, particularly those employing I/O-intensive memory bus manipulation, general-purpose I/O expansion, sequencing, interface translation, storage and human interface touch screen and key pad technology.

“Users continue to demand a growing list of features on their portable devices, and yet expect the cost and battery life of those devices to remain the same,” said Fares Mubarak, senior vice president of Actel Corporation. “Today, the new I/O-optimized, cost-effective IGLOO PLUS family gives designers a sophisticated feature-rich programmable logic platform for dramatically reducing power consumption without sacrificing functionality or driving up the cost of their end products.”

I/O Metrics

For any given package size, IGLOO PLUS delivers the industry’s best power-, area-, logic- and feature-per-I/O ratios in a programmable device. An IGLOO PLUS device delivers 6x better static power consumption, a 50% reduction in dynamic power consumption, a 2x improvement in I/O density and as much as 2.7x the logic density compared with competitive programmable logic devices in a similar package. For example, a competitive SRAM-based programmable solution in a 8mm x 8mm chip-scale package offers 25k equivalent system gates, 78 I/Os and 25 mW typical static power versus the 60k system gates, 157 I/Os and 10µW of an AGLP060 IGLOO PLUS FPGA in the same package.

Optimized for I/O-intensive portable applications, the new Actel IGLOO PLUS solutions also offer up to 16x better power per I/O. Assuming a design requires 100 I/Os, the 120-I/O AGLP030 IGLOO PLUS device consumes 5µW versus the roughly 60µW of the nearest competitive solution.

“Power consumption has moved to the forefront of issues involved in designing tomorrow’s electronic systems,” said Jordan Selburn, principal analyst at market research firm iSuppli. “Engineers have to tackle chip power first and foremost, yet still meet all of the technical requirements such as performance and interface—all while staying in budget. As FPGAs continue to cut power and price while simultaneously moving up in performance and pin count, iSuppli expects these devices to make further gains in power- and space-constrained applications.”

Improved I/O Capabilities

Ranging from 30,000 to 125,000 gates, the IGLOO PLUS family features three 1.2V devices that have been optimized to better meet the needs of I/O-intensive portable applications. In addition to the increase in I/Os per device, the new devices also feature four I/O banks for independent level shifting. Enabling the device to better support varying voltage levels, this is key for bridging between application processors and application-specific standard products (ASSPs), where differing I/O standards and voltages may be utilized. IGLOO PLUS devices support cost- and area-effective level shifting between 1.2-, 1.5-, 1.8-, 2.5- and 3.3V I/O standards and interface translation.

Additionally, the IGLOO PLUS devices also support independent Schmitt Trigger inputs and hot swapping. The Schmitt Trigger input delivers greater noise immunity in the circuit, enabling designers to safely identify an input signal that rises slowly, such as a keyboard or human touchpad. The hot swap capability offers additional flexibility as designers can now support direct system connection while powering up. This is beneficial for applications like portable media players and games, where solid state mass storage modules and human interface controllers are often connected and disconnected from the system in real time.

The IGLOO PLUS family also supports Flash*Freeze bus hold in IGLOO PLUS devices, allowing users to hold the I/O states “on” even in Flash*Freeze mode. In a digital picture frame, for example, the IGLOO PLUS device can be placed in Flash*Freeze mode to save power and will continue displaying a picture on screen. When the picture needs to be changed, the IGLOO PLUS device can resume dynamic power in a microsecond, having saved hundreds of microwatts of power while in the I/O hold state. This same capability is critical in smart phone, wireless audio and video applications.

Pricing and Availability

Samples of the IGLOO PLUS devices will be available in May with qualified devices available in Q3 2008. The IGLOO PLUS family is supported by the Actel Libero Integrated Design Environment (IDE) v8.3 software available in March. Volume pricing starts at $1.95 for the 120-I/O AGLP030 device in a CS201 package. For further information, please contact Actel or visit the company’s Web site at www.actel.com.

About Actel

Attacking power consumption from both the chip and the system levels, Actel Corporation’s innovative FPGAs and programmable system chip solutions enable power-efficient design. The company is traded on the NASDAQ National Market under the symbol ACTL and is headquartered at 2061 Stierlin Court, Mountain View, Calif., 94043-4655. For more information about Actel, visit http://www.actel.com.