FPGA design tool cuts power consumption

Version 8.4 of the Libero FPGA integrated development environment gives designers additional power supply options for lower power consumption and allows easy comparisons of various design scenario power consumption implications. It extends core operating range to 1.14 to 1.575 V for the flash-based IGLOO, IGLOO PLUS, and ProASIC3L FPGAs.

The package also allows IP blocks, user-developed HDL modules, and glue logic functions to be easily combined in a project area. It simplifies the design process with tools that remove tedious tasks like writing new HDL code for logic functions and making connections between the myriad functions on the chip. (Gold edition, free; Platinum edition, $2,495—available now.)

Actel , Mountain View , CA
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http://www.actel.com