The AD9520 and AD9522 multioutput clock generators include a 512-byte embedded EEPROM memory block, dividers, fanout buffers, and a VCO that tunes from 1.4 to 2.95 GHz. An external 3.3-V/5-V VCO/VCXO of up to 2.4 GHz also can be used.
The PLL/VCO clock-generation circuitry boasts a phase noise of −150 dBc/Hz at a 10-kHz offset on a 200-MHz clock signal, while the clock distribution fanout channels feature ultra-low wideband jitter performance of 225 fs. The AD9520 offers 12 differential LVPECL outputs in four groups, each with a 1 to 32 divider and phase delay, while the AD9522 includes 12 differential LVDS outputs. ($12.65 ea/1,000 — AD9520, available now; AD9522, samples available now.)
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