ADC achieves power savings without sacrificing ac performance

ADC achieves power savings without sacrificing ac performance

14-bit high-speed part draws just a third the power of competitive ADCs

Suited for battery-powered portable instrumentation and multichannel systems, the 14-bit 125-Msample/s LTC2261 A/D converter dissipates only 127 mW claimed less than a third the power of prior solutions. The converter operates from a 1.8-V analog supply and achieves a SNR performance of 73.4 dB and SFDR of 85 dB at baseband.

Features include a jitter performance of 0.17 ps rms, a power dissipation of 0.5 mW in sleep mode, a serial SPI port, and a data randomizer that can reduce residual tones caused by digital feedback by 10 to 15 dB. The part’s digital outputs can be set to full-rate CMOS, double-data-rate CMOS, or double-data-rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2 to 1.8 V.

The LTC2261 family comprises six pin-compatible members, offering 14-bit resolution at 125, 105, and 80 Msamples/s and 12-bit resolution at 125, 105, and 80 Msamples/s. Offered in a 40-pin QFN package, the converter includes a clock duty cycle stabilizer circuit to facilitate non-50% clock duty cycles, programmable digital output timing, programmable LVDS output current, and optional LVDS output termination. (From $9.50 ea/1,000 — prod qty, December.)

Linear Technology , Milpitas , CA
Literature 800-4-LINEAR
http://www.linear.com