Chip’s multistandard accelerator and flexibility aid affordable communication apps
The MSC8156 six-core DSP is said to deliver twice the performance and consume half the power of the previous-highest-performing programmable DSP, the MSC8144. The 45-nm-process chip has high-throughput Multi Accelerator Platform Engine for baseband (MAPLE-B) acceleration with two configurable RISC engines, which can be reprogrammed to accommodate updates. The processor will be available in 800-MHz and 1-GHz versions.
The device’s coprocessors provide high-performance in 3G-LTE, TDD-LTE, TD-SCDMA, and WiMAX standard communication applications, as well as High Speed Packet Access and HSPA+. The MSC8156 features 4 Mbytes of RAM, a configurable 512-Kbyte L2 cache or M2 memory attached to each of the six cores and 1 Mbyte of shared memory. The IC supports dual DDR3 external memories at up to 800 MHz and has dual Serial RapidIO x4 ports, a PCI Express x4 port, and dual 1-Gbit Ethernet (SGMII) interfaces.
The performance of the 783-pin, 28 x 28-mm chip means solutions to complex communication problems can be implemented without an associated FPGA. The device can process the PHY functionality of a single sector of 3G-LTE 10 MHz with data rates of up to 144 Mbits/s downlink/72 Mbits/s uplink with 4 x 4 MiMO. (From $192 ea/10,000 — samples available 1st qtr 2009.)
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