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45-nm CMOS for next-gen 60-GHz wireless

60-GHz technology chips are set to be widely available

BY PIET WAMBACQ and JAN CRANINCKX
Imec, Leuven, Belgium
http://www2.imec.be/

In the wireless communication world there is a never-ending demand for higher throughput to enable new mass-market consumer applications. The available 7-GHz band that is allocated around 60 GHz can accommodate the bandwidth necessary for higher-throughput wireless communication of 1 Gbit/s or more.

Today, IC solutions for 60-GHz applications are still in the development phase and the industry hesitates to massively move toward 60-GHz product deployment due to complications that may occur in the design phase (such as the influence of small parasitics and transmission lines effects). However, 60-GHz solutions will find their place in the market, and by the time 60-GHz applications are mass-market products, the 45-nm CMOS node will be mainstream in ICs for wireless. The high throughput and complexity of the digital part of a 60-GHz transceiver will require an aggressively downscaled CMOS technology.

Alternative IC technologies do not meet all these requirements for complex high-throughput 60-GHz radios. In III-V technologies, for example, it is not currently possible to produce complex mixed analog-digital ICs with a high yield. BiCMOS technology, on the other hand, would meet the speed requirements for the radio part, but the CMOS part of a BiCMOS technology typically lags a few generations behind compared to the most advanced plain digital CMOS available. The digital part of a 60-GHz transceiver in BiCMOS would need a large area and consume too much power.

Transmission lines and parasitics

Why does the industry still hesitate to move toward 60-GHz product deployment in deep-submicron CMOS? First, the mm-wave circuits are very sensitive to tiny interconnect parasitics such as capacitances of a few femtofarads and inductances of a few picohenries, which originate from on-chip interconnections even if they are quite short. Similarly, errors of a few femtofarads in the modeling of transistor parasitics can cause a significant difference between the simulated and the measured performance of mm-wave circuits.

Another issue that arises when using 60-GHz technology is the influence of transmission line effects. In transmission lines of a length that is of the order of magnitude of the electrical wavelength, there is a considerable phase shift between both line ends.

In classical RF IC design flows for chips operating below 10 GHz, transmission line effects are usually neglected because wavelengths at lower frequencies are much larger than most interconnect lengths on a chip. However, at 60 GHz, wavelengths are in the millimeter range and the length of many on-chip interconnections is not negligible. Hence, these lines should be modeled as transmission lines.

Imec researchers extend the classical RF IC design flow with the use of simulators that solve the Maxwell equations in three dimensions. The resulting design flow has led to first-time right ICs in 60-GHz 45-nm digital CMOS.

45-nm CMOS for next-gen 60-GHz wireless

A test bed for Imec’s 60-GHz chip-based receiver in 45-nm digital CMOS.

Analog performance

There are some other items that have to be dealt with before 45-nm CMOS solutions for 60-GHz wireless communication can become a reality. These are associated with the use of 45-nm CMOS. The high speed of an individual 45-nm transistor and the possibility of putting more digital gates per square millimeter is a big advantage, but the analog transistor performance degrades by downscaling.

This is seen in several aspects. First, the maximum voltage that a transistor can stand is about 1 V, which limits the signal swing. As a result, analog design is more complicated and the ability of a transistor to give much power is seriously limited.

Further, the intrinsic voltage gain of a downscaled transistor is decreased. For a 45-nm device, it is about five. As a comparison, in the 180-nm generation, intrinsic gains of about 30 could be reached. Further still, when using 45-nm transistors, 1/f noise is large.

Finally, there is the problem of variability. Transistors in the nanoscale generations are subject to tolerances in sizes. Inevitable errors of a few nanometers that occur during fabrication significantly influence the behavior of a transistor that has an effective gate length of just a few tens of nanometers. The small devices are also sensitive to inevitable tolerances in the amount of impurity atoms that have been implanted to set device behavior (such as to influence the threshold voltage) during fabrication.

The poor analog performance of a transistor has consequences for the architecture of the radio. To aid the problems, researchers are applying the concept of phased antenna arrays.

At 60 GHz, antenna arrays are not so bulky. The steering of the beam of the antennas is controlled on chip. Using multiple antennas in a transmitter relaxes the output power requirement, as the total power transmitted is the sum of the contributions of all antenna paths. At the receiver side, the use of multiple antennas increases the signal-to-noise ratio.

To deal with the problem of variability, the analog circuits are made programmable. If, for example, the bias point of a transistor deviates from the wanted one, it can be adapted digitally via a D/A converter that gives the wanted dc bias voltage at its output.

Antenna interface

The interface from the transceiver IC to the antenna requires more careful modeling when the operating frequency increases. The classical approach of mounting an RF IC (usually in a package) on a PCB for characterization needs to be complemented with characterization using wafer probes on ICs that are mounted unpacked on a PCB while the low-frequency connections of the chip are made with bond wires. Also, the de-embedding of the parasitics due to the use of wafer probes is more complicated at mm-wave frequencies than at microwave frequencies.

The 60-GHz research comprises various activities ranging from the system and algorithmic level to the level of IC design, antennas, and the different interfaces between IC, package, antennas and the board level. Imec has integrated the CMOS ICs in a module with antennas, resulting in a functional wireless link that can handle data rates above 1 Gbit/s. By solving these roadblocks, Imec proved that indeed, 60-GHz solutions are possible in 45-nm digital CMOS, without extra masks or extra thick metal layers.

More information can be found at http://www2.imec.be/be_en/research/green-radios.html

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