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Microsemi Product of the Year: The SmartFusion IC family

Microsemi Product of the Year: The SmartFusion IC family

We gave the Product of the Year award to the SmartFusion IC family from Microsemi (formerly Actel) because it put an FPGA fabric, a 100-MHz ARM Cortex-M3 processor, and programmable analog blocks all on one chip. We thought that was a very bright idea.

The hard-coded CPU has 128 to 512 Kbytes of flash and 16 to 64 Kbytes of SRAM and a multilayer AHB communications bus matrix to talk to everything. It has a 10/100 Ethernet MAC, and SPI, I2C, and UART interfaces, with 60-, 200-, or 500-K logic element in the FPGA. The analog subsystem has 12-bit A/D and D/A converters, signal-conditioning blocks, voltage and current monitors, and a temperature monitor.

Members of the SmartFusion product team

Rajiv Nema, Sr. Product Marketing Manager at Microsemi, filled me in on some interesting aspects of this products creation. During the development there were at least three key elements the design team found. First, from the market perspective, an observation that in more than half the systems with a 32-bit MCU there was also a PLD or an FPGA. Hence it was just a matter of time before engineers would be pushing for integration of the two. Also, the selection of the right processor for the IC’s target markets was very important and the ARM Cortex-M3 was the perfect choice.

The ability of Microsemi’s proprietary flash process to integrate a complete MCU with embedded flash, high voltage analog, and a high performance digital FPGA on the same silicon is obviously a key element. Another element was the implementation of the high bandwidth/low latency interface between FPGA and the microcontroller (the AHB bus matrix), which is something that cannot be done between a discrete FPGA and MCU.

One other key element was implementing the complete MCU in hard logic vs. soft FPGA gates, which yielded much better speed and also reduced the number of logic gates used. The design team saw an improvement of about 2X in speed of Cortex-M3 on SmartFusion and a complete “hard” microcontroller sub-system on SmartFusion would take 7-8 Million FPGA gates to implement which is an enormous saving and would be an impractical approach to take with a “soft” core.

Jim Harrison

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