ISE Design Suite 13.2 adds new features

ISE Design Suite 13.2 for Xilinx FPGAs provides full support for the 28 nm 7 series families and gives an up to 25% performance increase in designs targeting Virtex-7 2000T devices, the industry's largest density FPGAs built using Stacked Silicon Interconnect technology.

This latest release also has enhancements to the PlanAhead design and analysis tool, providing partial reconfiguration support for Virtex-7 and Kintex-7 FPGAs. Enhancements to PlanAhead include new clock domain interaction reports, tooltip language localization, and Simultaneous Switching Output (SSO) support for 7 Series flip chip BGA packages. Updates to XPower Estimator tool enable power-consumption predictions with higher accuracy. New features enable Advance eXtensible Interface (AXI) interconnect support in CORE Generator system to build higher performance point-to-point architectures. (Starting at $2,995 – available now.)

by Jim Harrison

Xilinx , San Jose , CA
Sales 408-559-7778
www.xilinx.com