The 11-bit, 2.5 Gsamples/s AD9737A D/A converter is claimed to reduce cable head-end chain footprint. The DAC enables cable television and broadband operators to synthesize the entire cable spectrum up to 1 GHz into a single RF port, while consuming a maximum of 1.1 W of power.
In addition, the device’s wide bandwidth and dynamic range enable cable infrastructure designers to increase QAM channel density by 20x over present cable modem implementations. The part features a programmable output current of 8.7 to 31.7 mA, a supply voltage from 1.8 to 3.3 V, and a dual-port DDR, LVDS interface which supports the maximum conversion rate of 2,500 Msamples/s.
On-chip controllers manage external and internal clock domain skews. The part is supplied in a 16-ball CSBGA package. Complementary components include ADI’s ADCLK914 clock/data buffer that drives the clock input of the AD9737A D/A converter with a 2 V differential swing that achieves jitter performance of 110 fs.
By Christina Nickolas
Analog Devices , Wilmington , MA
Sales 800-262-5643
www.analog.com
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