Clock buffer and divider delivers low jitter

The AD9508 clock buffer and divider IC delivers a low jitter of 41 fs across the 12- to 20-kHz band.  The 1.65-GHz device  is designed for communications, instrumentation, defense and aerospace equipment that require ultra-high-speed data conversion with optimum SNR (signal-to-noise ratio) performance.

The device has four dedicated output dividers with bus-programmable division (integers up to 1,024) and phase delay, and automatic synchronization. The dividers also have pin-strapping capability for hardwired programming at system power-up.

Housed in a 24-lead LFCSP package, the part also features an out-to-output skew of less than 48 ps (LVDS), a supply voltage of 2.5/3.3 V, and an operating temperature of -40º to 85ºC. The AD9508 supports up to four differential, or eight single-ended outputs and three logic levels: LVDS (1.65 GHz), HSTL (1.65 GHz), and CMOS (250 MHz).($4.25 ea/1,000 – available now)