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Secure boot reference design is FPGA based

The FPGA-based Secure Boot Reference Design for embedded microprocessors uses the advanced security features of a SmartFusion2 SoC FPGA to securely boot any application processor. The design ensures that processor code can be trusted and allows applications running on the securely booted processor to extend that trust to their system and to other connected systems.

GAJH01_Microsemi_Apr2014  

Microsemi's reference design implements a “chain of trust” process. At each stage of the boot-process, through to the top application layer, the subsequent boot phase is validated by the previously trusted code before further code execution is allowed. The SmartFusion2 SoC FPGA has a number of security features including on-chip oscillators, accelerators for cryptographic services, secure key storage, a true random number generator, on-chip boot code storage in secure embedded flash memory (eNVM), and fast SPI flash memory emulation to enable a secure boot of an external processor at full speed.

The design also provides a public instance of Microsemi's WhiteboxCRYPTO security product, which enables transport of a symmetric encryption key in a plain text environment through complex algebraic decomposition of the crypto key and strong obfuscation.

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