The risk of RISC-V

This month, SiFive will launch an Arduino version of its open-source RISC-V processor on Crowd Supply. In doing so, it spotlights the question of just how practical it is to launch a new processor architecture when so many efforts to do so have failed, especially when there are two perfectly good architectures available and there are so many other ways to innovate — on top of the hardware.

The argument for RISC-V goes something like this: It’s an inherently better architecture than the x86 (complex instruction set computer, or CISC) or ARM (reduced instruction set computer, or RISC); free is good; and being open and extensible at the instruction-set level allows for unprecedented levels of innovation and flexibility from “the community.”

Given the cost of custom silicon, the need for ultra-low power, the dependence upon the x86, and the uncertainty surrounding ARM with its buyout by Softbank, RISC-V’s star is rising rapidly. It was hailed as “the Linux of microprocessor architectures” by none other than Linley Gwennap’s Microprocessor Report, which signed off on it as the best technology of 2016.

Of course, over the years, we have seen many great technologies come and go: the famous transputer, then Transmeta, and during the 1990s and early 2000s, there were a host of wonderful signal-processing architectures to tackle wireless and wired communications. But they’re gone. Why?

Putting marketing and timing aside for now, it’s just plain hard to launch a new architecture: Infrastructure support, software support, manufacturing, and related IP support are just a few of the issues. Then there’s fear of the unknown: There needs to be a really clear return on risk (RoR) for a designer to even think about putting their company’s fortune on the line by selecting a new architecture, especially when there are at least three perfectly good architectures available: x86, ARM, and MIPS (also RISC).

The x86 and ARM architectures are also well supported and have solid roadmaps. While there are fees associated with using them, those fees are a small portion of any given design, and with them come assurances of continuity and ecosystem support. This support is critical for even ultra-low-cost MCUs in which a “free” RISC-V architecture might start to look attractive, especially if it can follow through on processing efficiency.

With the RISC-V ISA, SiFive is working to make custom ICs viable.  

Still, the 50 paying members of the RISC-V Foundation aren’t newbies to the processing game, including Google, Hewlett Packard Enterprise, IBM, Nvidia, AMD, and Qualcomm. They are encouraging the groundswell of support for the RISC-V, particularly from academia. In fact, the group’s latest workshop was held on the Google campus in December to packed rooms.

For many, this groundswell of support is almost like the early days of Linux, and that’s where RISC-V starts to get interesting: it’s almost got a cult feel to it. At the head of the cult is David Patterson, who coined the term RISC and set the RISC-V movement on fire with a 2014 paper on the topic, “Instruction Sets Should Be Free: The Case For RISC-V” (EECS, August 6, 2014). In the paper, Patterson laid out the case, including the patent minefield that current architectures represent, performance compromises, and the comment that even long-standing companies that may support current ISA architectures do go away in time, giving DEC as an example.

Of particular interest, given what’s happening in today’s highly charged security environment, is the note that a shared open core design would mean, “…transparency that would make it hard, for example, for government agencies to add secret trap doors.” That in itself might be enough to fan the flames of the RISC-V movement.

Still, there’s another factor: The interest of Google can always be dismissed as yet another fire into which Google would like to stick a poker — just to see what happens. But there’s more to it than that. While open-source hardware is a whole lot more complex than open-source software (à la Linux) — and we know how hard that was to get off the ground — there is the same level of engineering community interest in making it happen.

Why? Because it’s a challenge and a chance to up-end the status quo. Engineers are happy to devote time, free of charge, just for the chance to be a part of that. With someone like (now-retired) David Patterson at the helm, that has staying power — much more than a venture-capital-funded startup with its own closed, proprietary architecture. It’s going to be an interesting couple of years ahead.

Reference: https://people.eecs.berkeley.edu/~krste/papers/EECS-2014-146.pdf