If we can’t improve the battery, let’s increase efficiency

By Gary Elinoff, contributing writer

It’s hardly any news that the biggest problem in electronic design today is power for semiconductors in mobile, remote, or inaccessible devices. For that reason, the National Science Foundation (NSF) has awarded a grant at the University of Texas at San Antonio (UTSA) to commercialize chips that can use the limited battery power available to greater effect. The key to the project, led by Professor Ruyan Guo, is exploiting near-threshold voltage (NTV).

Holding back the progress of the Internet of Things

The Internet of Things (IoT) is revolutionizing manufacturing and maintenance over a wide swath of industry and transport. This new technology requires that every point in a power plant, vehicle, or system be measurable and controllable remotely. But you can’t do it if there’s no electricity. Shutting down operations and sending in a technician to replace a battery in a hazardous or inaccessible area can be an expensive and dangerous proposition. Semiconductors operating at NTV may be a solution to this dilemma.

What is NTV?

For a field-effect transistor (FET), the threshold voltage is the smallest gate-to-source voltage needed to turn the device on, or putting it another way, to conduct voltage between the source and drain. Operating at NTV, just above the threshold voltage, saves a great deal of power. But the flip side is that the device doesn’t operate at its full computational power. In some cases, that’s no problem. Mobile devices are idle most of the time, and IoT devices are on standby almost all of the time.

Because of this, a device empowered to operate at NTV will do so most of the time. While it may need to “wake up” to do its job, it only does so very infrequently. Overall, that means less power consumed, and a battery can go far longer before it needs to be recharged — great for mobile devices and a potential game changer for the IoT. And of course, a device that uses less power also generates less heat, another boon to designers.

Hurdles to overcome

Power consumption in an FET is proportional to CV² F, in which C is the device’s capacitance, V is the voltage, and F is the signal frequency. As illustrated in the image below, the switching power consumed by the device decreases in proportion to 1/V² , but leakage energy actually increases with lowered voltage.

Source: Qian Yu, ARM.

As illustrated, the voltage at which the device uses the least combined leakage and switching energy is defined here as the minimum energy point (MEP). A goal of the USTA project is to develop a tiny module that can be designed into systems chips to take advantage of this phenomena when the chip is on standby, as it will be most of the time.

Careful design is especially critical, as tolerances are extremely tight at voltages at or near NTV. Additionally, engineers use established software models in the chip design process, but these models don’t scale down to voltages as low as NTV. While these problems won’t stop the adaptation of this exciting new finding, they are significant obstacles to overcome.