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Pentek announces 4-channel 200 MHz A/D with 32 DDCs Jade XMC module for communication and radar systems

Jade
• Four 200 MHz, 16-bit A/Ds
• Four wideband FPGA-based Digital Down Converters (DDCs)
• 32 narrowband FPGA-based DDCs
• XMC (VITA 42) with PCIe Gen 3 interface
• Jade Architecture with Xilinx Kintex UltraScale FPGA
• Navigator Design Suite for streamlined IP development 

Pentek, Inc., introduced the newest member of the Jade™ family of high-performance data converter XMC modules based on the Xilinx Kintex UltraScale FPGA. The Model 71862 includes four 200 MHz, 16-bit A/D channels and a unique combination of 32 programmable multiband DDCs for both wideband and narrowband frequency monitoring.

Performance IP Cores
The 71862 factory-installed functions include four A/D acquisition IP modules, each containing nine DDCs. In each module, the wideband DDC supports decimations from 2 to 32 for capturing signal bandwidths up to 80 MHz. The eight narrowband DDCs allow decimations up to 1024 for signal bandwidths down to 16 kHz. These two types of DDCs operating in parallel are ideal for applications that need to monitor a wide spectrum, but quickly tune to identified frequency bands of interest for further analysis.

“The combination of wideband and narrowband DDCs is a common request from our customers,” said Bob Sgandurra, director of Product Development of Pentek. “The added resources of the Kintex UltraScale FPGAs allow us to include these powerful functions in our Jade products at a very competitive price. The Model 71862 makes an ideal turnkey platform for FPGA-processing IP solutions in communication and radar systems.” 

The Jade Architecture
The Pentek Jade Architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50% with equally impressive reductions in cost, power dissipation and weight. As the central feature of the Jade Architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data 
 
multiplexing, channel selection, data packing, gating, triggering and memory control. A 5 GB bank of DDR4 SDRAM is available to the FPGA for custom applications. The x8 PCIe Gen 3 link can sustain 6.4 GB/s data transfers to system memory. Eight additional gigabit serial lanes and LVDS general purpose I/O lines are available for custom solutions.

Navigator Design Suite for Streamlined IP Development Pentek’s Navigator™ Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (Board Support Package) for creating host applications. The FDK includes factory installed modules as documented source code. Developers can integrate their own IP with the Pentek factory-installed functions or use the Navigator kit to completely replace the Pentek IP with their own.
Users can work efficiently at the API level for software development and with an intuitive graphical interface for IP design. The Navigator BSP is available for Windows and Linux operating systems.

Pre-Configured SPARK System Ready for Immediate Use With a Pentek 8266 SPARK® PC, 8264 SPARK 6U VPX, or 8267 SPARK 3U VPX development system, work can begin immediately on applications. A SPARK system saves engineers time and expense associated with building and testing a development system and ensures optimum performance of Pentek boards. SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.

Form Factors
The Model 71862 XMC (VITA 42) module is designed to operate with a wide range of carrier boards in PCIe, 3U & 6U VPX, AMC, and 3U & 6U Compact PCI form factors, with versions for both commercial and rugged environments.

Pricing and Availability
Designed for air-cooled, conduction-cooled, and rugged operating environments, the Model 71862 XMC module with 5 GB of DDR4 SDRAM. Additional FPGA options are available.

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