CML Microcircuits has introduced the CMX940, a fully integrated fractional-N RF synthesizer with a voltage-controlled oscillator (VCO), touting low phase noise and excellent spurious performance in a low-power single chip for wireless systems. Applications include private mobile radio (PMR), data modems, and marine radios.
In many cases, synthesizers used in these applications use a PLL IC with a large number of discrete external parts to implement the VCO, which takes up PCB real estate. By providing a more integrated approach to synthesizer designs, CML said it aims to reduce component count, save board space, eliminate VCO tolerancing issues, and speed up time to market.
CML uses a dual-loop architecture with a highly-configurable reference path, consisting of a separate PLL and VCO, to minimize close-in phase noise and to mitigate integer and fractional boundary spurious. It also features other innovations such as noiseless clock multiplier technology, contributing to the device’s high performance.
“Managing phase noise and spurious performance are fundamental to meeting international, including ETSI, radio standards such as EN 300 113 and EN 300 086, mandated for narrow-band systems,” said CML.
The CMX940 RF synthesizer operates from a 3.0 to 3.6 V supply, with a current consumption of between 23 mA and 64 mA depending on device configuration, which makes it suited for portable and battery-powered applications. In addition, at a carrier frequency of 500 MHz the typical phase noise is -124 dBc/Hz at 12.5 kHz offset and spurious products are better than -75 dBc, said CML.
The CMX940 can generate RF signals over a continuous frequency range from 49 MHz to 2040 MHz, with dual single-ended RF outputs to support Rx and Tx sub-systems. It only requires an external loop filter and clock reference to provide a compact local oscillator (LO) source, said CML.
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