Renesas Electronics Corp. has developed several processor technologies for automotive systems-on-chips (SoCs) used in applications such as advanced driver assistance systems (ADAS) and autonomous driving (AD) systems that support performance and power efficiency optimization and a high level of functional safety. This particularly is important in ADAS and AD systems that require deep learning performance of 60 TOPS or 120 TOPS together with power efficiency and need to meet the functional safety equivalent to ASIL D – the strictest safety level in the ISO 26262 automotive safety standard
The three new developments include a convolutional neural network (CNN) hardware accelerator core that delivers 60.4 trillion operations per second (TOPS) and a power efficiency of 13.8 TOPS/W, sophisticated safety mechanisms for fast detection of and response to random hardware failures, and a mechanism that allows software tasks with different safety levels to operate in parallel on the SoC without interfering with each other, which bolsters functional safety for ASIL D control, said Renesas.
These technologies have been incorporated into the company’s latest R-Car V3U automotive SoC. The R-Car V3U is the first SoC using the R-Car Gen 4 architecture for ADAS and AD, enabling scalability from entry-level NCAP applications up to highly automated driving systems.
Renesas has implemented three CNN hardware accelerator cores in a high-density configuration on the R-Car V3U. The R-Car V3U also provides 2 megabytes (MB) of dedicated memory per CNN accelerator core, for a total of 6 MB of memory. This reduces data transfers between external DRAM and the CNN accelerator by more than 90 percent and achieved a high CNN processing performance of 60.4 TOPS with best-in-class power efficiency of 13.8 TOPS/W (measured on an optimized network), according to the company.
The new safety mechanisms deliver fast detection of and response to random hardware failures occurring in the SoC overall. “Both reduced power consumption and a high failure detection rate are achieved by combining safety mechanisms suited to specific target functions,” said Renesas. The company expects the safety mechanism incorporated into the R-Car V3U will enable the majority of the SoC’s signal processing to achieve the ASIL D metrics, making it capable of independent self-diagnosis, reducing the complexity of fault tolerant design in an AD system.
When software components with different safety levels are incorporated into a system it’s necessary to prevent lower-level tasks from causing dependent failures in higher-level tasks and ensure freedom from interference (FFI) in the SoC when accessing control registers in various hardware modules and shared memory. “Achieving freedom from FFI between software tasks is an important aspect of meeting functional safety standards,” said Renesas.
The new FFI support mechanism monitors all data flowing through interconnects in the SoC and blocks unauthorized access between tasks. “This enables FFI between all tasks operating on the SoC, making it possible to realize an SoC for ASIL D applications capable of managing object identification, sensor fusion with radar or LiDAR, route planning, and issuing of control instructions with a single chip,” said Renesas.
Renesas is showcasing these new automotive SoC technologies at this week’s International Solid-State Circuits Conference 2021 (ISSCC 2021), February 13-22, 2021.
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