Renesas launches MPUs based on 64-bit RISC-V CPU core

Expanding its existing family of Arm CPU-core based microprocessors (MPUs), Renesas Electronics has launched the RZ/Five general-purpose MPUs based on a 64-bit RISC-V CPU core. The RZ/Five uses the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA), and is the first on the market built around the Andes 64-bit RISC-V core.

(Source: Renesas Electronics)

The RZ/Five is optimized to meet the performance and peripheral functions required for IoT endpoint devices. The MPUs offer a maximum operating frequency of 1 GHz. Peripheral functions include multiple interfaces, including two Gigabit Ethernet channels, two USB 2.0 channels, and two CAN channels, as well as dual A/D converter modules. It can also connect external DDR memory with error checking and correction (ECC) and security functions.

The peripheral functions and package of the RZ/Five are compatible with the Arm core-based RZ/G2UL, which allows for reuse of designs. A RZ SMARC Evaluation Board Kit will be offered with a module board conforming to the SMARC 2.1 standard, which is equivalent to the RZ/G Series. This kit allows for switching and evaluating between an RZ/Five CPU module and an RZ/G2UL CPU module.

RZ/Five MPU block diagram. Click for a larger image. (Source: Renesas Electronics)

Like the RZ/G Series, a Verified Linux Package (VLP), featuring the industrial-grade Civil Infrastructure Platform (CIP), is available for the RZ/Five. This makes the series suited for corporate infrastructure and industrial applications that require a high level of reliability and extended service life, said the company.

Renesas will provide a complete system solution for the RZ/Five CPU module including Renesas’ DA9062 power management IC, 5P35023 programmable clock generator, AT25QL128A flash memory, and SLG46538 GreenPAK IC.

Samples of the RZ/Five MPUs are available now. Mass production is scheduled to begin in July 2022.