Embedded world 2022 was the place to be for the latest RISC-V developments. Innovations ranged from Think Silicon’s first RISC-V–based GPU, targeting 32-bit SoCs, to the OpenHW Group’s new open-source RISC-V development kit, based on the OpenHW CORE-V microcontroller (MCU).
This all happened as a backdrop to RISC-V International’s first specification and extension approvals for 2022. RISC-V International, the global open-design standards organization for the RISC-V Instruction Set Architecture (ISA), released its first four specifications and extension approvals of 2022. These include the Efficient Trace for RISC-V (E-Trace), RISC-V Supervisor Binary Interface (SBI), RISC-V Unified Extensible Firmware Interface (UEFI) specifications, and the RISC-V Zmmul multiply-only extension. This follows 16 ratified specifications, representing more than 40 extensions, in 2021.
Nitin Dahad, editor-in-chief of embedded.com, spoke with Calista Redmond, CEO of RISC-V International, at embedded world 2022 about the organization’s specifications and extension approvals in 2022 and what’s ahead for RISC-V.
Here is a sampling of RISC-V announcements at embedded world 2022.
RISC-V processors
Think Silicon has claimed the industry’s first RISC-V-based GPU — the NEOX G-Series & A-Series — targeting 32-bit SoCs. Applications include smartwatches, augmented-reality (AR) eyewear, video for surveillance and entertainment, and smart displays for point-of-sale/point-of-interaction terminals. NEOX IP pre-evaluation systems are available for customer testing.
The company will also introduce the NEMA|pico-VG, the latest addition to the NEMA|GPU-Series for microcontroller-driven SoCs, which supports rich vector graphics and improves system efficiency by offloading CPU utilization up to 95%, said the company.
Touted as a “new era of smart GPU architectures,” the NEOX| G (graphics) & A (deep-learning accelerator) Series IP delivers programmable compute shaders running on a real-time operating system (RTOS), with lightweight graphics and machine-learning (ML) frameworks. The multi-threaded system can be customized for graphics, ML, vision/video processing, and general-purpose compute workloads through configurable programming libraries using the same hardware blocks.
The NEMA|pico-VG high-performance and ultra-low–power graphics target power-, size-, and cost-constrained devices. Applications include smartwatches, fitness/GPS trackers, and smart-home devices. The multi-core, vector, and 2.5D raster graphics GPU supports clock frequencies from 90 to 500 MHz, 70 fps, and 800 × 600 resolution in an area of 0.21 mm2.
The NEMA|pico-VG uses smart-compression algorithms to manage memory, which reduces the CPU utilization by up to 95% compared with software-only solutions, according to Think Silicon.
Think Silicon also showcased its NEMA|GUI-Builder tool that enables programmers to reduce GUI development time on SoC platforms (MCUs/MPUs) by using drag-and-drop common control and input elements. It automatically produces power- and performance-optimized C code with a small memory footprint by using the 3D features of the NEMA|GPU-Series. It includes the company’s NEMA|GFX software API and its compression technology, NEMA|TSC, which can also be used with non-Think Silicon GPUs, said the company.
Recommended
Embedded world 2022: Processors, MCUs, and motor control
Imagination Technologies has launched the IMG RTXM-2200, its first real-time embedded RISC-V CPU. This 32-bit embedded CPU can be integrated into complex SoCs for a range of applications, including networking solutions, packet management, storage controllers, and sensor management for AI cameras and smart metering. The IMG RTXM-2200 is one of the first commercial cores in Imagination’s Catapult CPU family, previously announced in December 2021. It complements the company’s GPU, AI accelerator, and Ethernet Packet Processor (EPP) cores.
This embedded core features up to 128 KB of instruction and data memory for deterministic response and Level 1 cache sizes of up to 128 KB. The new CPU offers a range of floating-point formats, including single-precision and bfloat16, which enables the deployment of AI applications without the need for an additional chip, said the company.
The real-time embedded cores come with a fully capable software development kit (SDK) and tools package and works of the box across multiple platforms. The Catapult Studio Integrated Development Environment (IDE) runs on Windows, Ubuntu, CentOS, and macOS and offers full Linux support. It is also compatible with gem5 software.
Nitin Dahad, editor-in-chief of embedded.com, spoke with Shreyas Derashri, vice president of compute at Imagination Technologies, at embedded world 2022 about RISC-V megatrends and the Catapult CPU family and Catapult Studio IDE.
Codasip, a provider of customizable RISC-V processor IP and processor design automation, made several announcements at embedded world. This includes the addition of Veridify Security Inc.’s secure boot to its RISC-V processors. As part of its quantum-resistant secure tools, Veridify’s secure algorithm validates firmware as it loads onto the Codasip processor.
“The secure boot functionality is based on an algorithm that runs faster than traditional encryption methods,” said Codasip, “only requiring a small code space and ultra-low power, making it well-suited to Codasip’s family of low-power embedded processors.”
Because Veridify’s methods are quantum-resistant against all known threats, they support Codasip processors in long-life embedded applications, such as remote monitoring systems, surveillance cameras, and smart meters, and Veridify’s tools can be used to enable additional security features like secure firmware updates, authentication, and data protection, added the company.
Nitin Dahad, editor-in-chief of embedded.com, spoke with Rupert Baines, CMO of Codasip, at embedded world 2022 about its RISC-V processor IP “with a twist.”
Codasip also announced that its Codasip Studio platform, an automated platform for customization of Codasip’s RISC-V processor IP, now supports Apple macOS Monterey (the current major release of macOS). The platform was upgraded to version 9.1 in October 2021, providing additional bus interfaces and enabling the development of more powerful application cores and multi-core systems.
In addition, Codasip’s customizable L31 embedded RISC-V processor was chosen as an Embedded World 2022 Best in Show Winner in the Processors & IP category. The Codasip L31 is the company’s latest range of low-power embedded RISC-V processor cores optimized for customization. The cores can be customized to support tasks such as neural networks (AI/ML), even in the smallest, power-constrained applications, such as IoT edge, said the company.
Recommended
Embedded world 2022: Modules and IoT edge computing
SiFive Inc. showcased the latest version of its SiFive Intelligence X280 processor. Based on the RISC-V Vector Extension (RVV) Version 1.0, ratified by RISC-V International in 2021, the company’s vector processing addresses the demand for data-driven applications, including AI inference, image processing, data-center acceleration, and automotive. The latest version introduces several new features including scalability up to a 16-core cache-coherent complex (up to four clusters of four-core complexes and scaling to multi-TOP performance), WorldGuard-trusted protection, and a new interface (VCIX, or Vector Coprocessor Interface eXtension) for integration between the X280 vector unit and customer-designed external AI accelerators or other coprocessors.
Optimized for AI/ML compute at the edge, the SiFive Intelligence X280 is a multi-core and multi-cluster–capable RISC-V processor with full support of the RISC-V vector extension standard and SiFive Intelligence Extensions. It is well suited for applications requiring high-throughput, single-thread performance while under power constraints (e.g., AR, VR, sensor hubs, IVI systems, IP cameras, digital cameras, and gaming devices), said the company.
Dev kits and IDEs
The OpenHW Group and its member companies announced a new open-source RISC-V development kit, featuring the OpenHW CORE-V MCU, the CORE-V SDK with full-featured Eclipse IDE, and an open printed-circuit–board design that supports Amazon Web Services (AWS) via AWS IoT ExpressLink. The non-profit OpenHW Group collaborates in the development of open-source processor cores and related IP tools and software.
The RISC-V–based CORE-V MCU DevKit targets software development for embedded, IoT, and AI-driven applications. The CORE-V MCU is based on the open-source CV32E40P embedded-class processor. It is a small and efficient, open-source 32-bit RISC-V core with a four-stage pipeline that implements the RV32IM[F]C RISC-V instruction extensions.
The organization and its members demoed the OpenHW CORE-V MCU DevKit for Cloud Connected IoT at embedded world. The demo, emulating an array of weather station sensors located throughout the exhibit hall as well as in other various global locations, included more than a dozen development kits. It highlighted the CORE-V MCU, CORE-V SDK, and interconnection of IoT sensors and application to AWS, with local temperature readings on the CORE-V MCU DevKit NexysA7 board.
The DevKit SDK is comprised of an IDE, debugger, GCC compiler (supplied by Embecosm), FreeRTOS real-time OS, and AWS IoT ExpressLink connectivity, using Espressif’s RISC-V–based Wi-Fi radio over AWS IoT ExpressLink. This project was supported by members of the OpenHW community, including GlobalFoundries, Imperas, Siemens EDA, SiLabs, ETHZ, QuickLogic, CMC Microsystems, Embecosm, and Ashling.
Nitin Dahad, editor-in-chief of embedded.com, spoke with Rick O’Connor, president and CEO of the OpenHW Group, at embedded world 2022 about its new RISC-V-based CORE-V MCU Development Kit and demo using the AWS IoT ExpressLink with collaborators around the world.
The CORE-V MCU includes QuickLogic’s eFPGA, designed to accelerate AI/ML and other computationally intensive workloads from the CV32E40P processor, based on the Parallel Ultra Low Power (PULP) Platform RI5CY core, originally developed at ETHZ’s Integrated Systems Laboratory (IIS) and the Energy-efficient Embedded Systems (EEES) group of the University of Bologna. Imperas released the riscvOVPsimCOREV as a free simulator for the CORE-V MCU, based on RISC-V reference models used in the verification of CV32E40P. Early access CORE-V MCU DevKit quantities are limited and can be reserved here.
MikroElektronika (MIKROE) introduced major upgrades to its NECTO Studio IDE. Version 2.0 adds full RISC-V support and CMake project-native support, in addition to Editor, Designer & Code Model improvements. NECTO Studio 2.0 is a cross-platform software development kit for embedded applications. It provides everything needed to start developing and prototyping, including Click board applications and GUIs for embedded devices, said the company.
“With its customizable open-source design and lack of licensing fees, RISC-V is gaining international traction,” said Nebojsa Matic, CEO of MIKROE, in a statement. “NECTO Studio 2.0 comes with natural support for GCC compilers for RISC-V. Currently, we support over 14 RISC-V MCUs, providing designers real choice. But we also support the RISC-V architecture in our mikroSDK, providing a complete set of mikroSDK 2.0 libraries for RISC-V, enabling designers to use all the Click libraries on RISC-V MCUs and to easily switch between different architectures without changing a single line of code.”
Nitin Dahad, editor-in-chief of embedded.com, spoke with Nebojsa Matic, CEO of MIKROE, at embedded world 2022 about the company’s NECTO Studio 2.0 and hardware-as-a-service.
NECTO Studio 2.0 also now uses the CMake build system with added unique CMake features for adding files, removing files, and renaming files for the CMake project, as well as adding/removing libraries from the CMake project. This makes it easier and more intuitive to use without the steep learning curve, said the company.
Users can also use the NECTO Studio 2.0 IDE to run Planet Debug, a hardware-as-a-service platform. Designers can develop and debug embedded systems remotely for $4 per day by reserving time on a remote Planet Debug station configured to their requirements.