ADC and clock combo offers high SNR, SFDR

The 16-bit, single-channel, 135-Msamples/s ADS5483 A/D converter and CDCE72010 clock synthesizer when combined together on the same module (with a crystal bandpass filter to drive the ADS5483 at 122.8 Msamples/s) achieve 78-dBfs SNR and 89.1-dBc SFDR with a 100-MHz input frequency. Sampling at 135 Msamples/s, the ADC can achieve a SNR of 78.6 dBFS with 95 dBc SFDR for a 70-MHz input frequency, which is up to 3.5 dB greater SNR or 8 dB greater SFDR over comparable ADCs.

The ADS5483 uses differential double-data-rate LVDS outputs to significantly reduce the number of I/O traces and pins it consumes on FPGA or ASIC devices. The CDCE72010 clock synthesizer provides a jitter performance at less than 50fs and can support up to 10 LVPECL, 10 LVDS, or 20 LVCMOS configurable outputs at frequencies up to 1.5 GHz and input frequencies from 8 KHz up to 500 MHz. (Ea/1,000: ADS5483, $65.00; CDCE72010, $10.95 — available now.)

Texas Instruments , Dallas , TX
Product Information Center 800-477-8924
http://www.ti.com