Agilent Technologies Inc. (NYSE: A) today announced it will demonstrate new features in its Agilent EEsof EDA software at the 51st Design Automation Conference (Booth 419), June 1-5, at the Moscone Convention Center in San Francisco, California. The software being demonstrated includes the Advanced Design System (ADS) 2014 platform—the world’s leading electronic design automation software for RF, microwave and high-speed digital applications—and GoldenGate, EMPro and SystemVue, all of which play an integral role in Agilent’s RF circuit, system and 3-D electromagnetic design and simulation solutions.
Some of the key new software features to be highlighted include:
Silicon RFIC design
New silicon RFIC interoperability enables ADS to edit and simulate designs created in Cadence Virtuoso software and vice-versa.
New wireless verification test benches for GoldenGate and ADS support LTE-A, LTE and 802.11ac design.
ADS enables front-to-back for small-scale silicon RFIC design using the latest ADS 2014.01 functionality updates, like device recognition LVS and EM/circuit co-simulation.
System-level design and verification
SystemVue, Agilent’s premier system-level EDA platform, features high-performance design personalities for wireless/4G, radar/electronic warfare, and next-generation verification that creatively integrate system, circuit and multi-channel test.
In the test and measurement space, SystemVue’s automated FPGA design flow now targets Agilent’s M9703A high-performance multi-channel wideband digitizer for real-time application development, in areas such as beamsteering and phased arrays. Such levels of integration with RF and DSP EDA tools make SystemVue an ideal modeling and verification “cockpit” for challenging communications areas, such as 5G research and development.
Modeling and characterization of CMOS and III-V devices
An end-to-end device characterization and modeling platform based on Agilent software products (IC-CAP, MBP, MQA and WaferPro Express) provides both an open, user-programmable environment and built-in, turnkey solutions to wafer-level automated measurement and modeling of semiconductor devices for cutting-edge logic, AMS and RF technologies (e.g., FinFET, UTSOI, GaN, LPE, aging, local/global variation, and corner modeling).
The industry-leading advanced low-frequency noise analyzer provides a complete hardware/software system to measure and analyze flicker noise and random telegraph noise in packaged or on-wafer semiconductor devices and circuits.
More show information is available at www.dac.com.
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