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APIX PRBS block diagram

Socionext - APIX PRBS block diagram

The MB86R1x Family combines a high-performance CPU with four video inputs and up to three display outputs, enabling high-speed image processing of video data I/O from these interfaces. The essential key feature of MB86R12 is its Inova Semiconductors’ high-speed APIX2® (Automotive/Advanced Pixel Link) GBit/s interface. This point-to-point connectivity transmits uncompressed and resolution independent pixel data over long distances for cameras and displays. The APIX® technology consists of a downstream link and an optional upstream link.

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