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Automotive MCUs feature a new graphics engine

Infineon’s new TRAVEO T2G cluster family of automotive MCUs with a new graphics engine delivers new smart rendering technology.

Infineon Technologies AG has unveiled its TRAVEO T2G cluster family of automotive microcontrollers (MCUs) with a new graphics engine, claiming outstanding performance for automotive graphics applications with a new smart rendering technology. The graphics engine minimizes the memory required for graphics processing by a factor of 3 to 5 for lower power consumption and lower costs.

The optimized 2.5 D graphics engine also enables the MCUs to support full virtual instrument clusters with a high resolution of up to 1920 × 1080, Infineon said.

Infineon's TRAVEO T2G cluster automotive MCU.

(Source: Infineon)

With a dedicated graphics accelerator, the TRAVEO T2G cluster MCU family enables cluster, infotainment and cockpit systems with microprocessor performance at MCU cost, according to the company.

“The MCU family uses innovative line-based processing based on an Infineon patent, which enables significant line buffer savings by a factor of 10 compared to competitive devices, resulting in lower power consumption, less memory needs and lower BOM cost,” said Ralf Koedel, Infineon’s vice president for microcontroller smart mobility, in a statement.

The small footprint of the automotive MCUs also make them easier to integrate, while reducing BOM costs, said the company. This makes them suited for a variety of applications, including advanced smart mobility instrument cluster and heads-up display systems for automobiles, motorcycles, and off highway mobility as well as for industrial and medical applications.

Based on up to two Arm Cortex-M7 cores with up to 320 MHz, the TRAVEO T2G cluster microcontroller family enables ASIL-B/SIL-2 safety performance. The MCU family features up to 6 MB of Flash and up to 4 MB of internal VRAM or 1-GB LPPDR4 VRAM. Security features include an EVITA high-level HSM that provides advanced security with hardware encryption accelerators and enhanced hardware protection with a dedicated ARM Cortex-M0+.

The MCUs are available in a wide range of packages, ranging from 500-pin BGA (via 216-pin TEQFP) to 144-pin LQFP. CAN-FD, LIN, Gigabit Ethernet and CXPI are available as embedded peripherals. Other features include a JPEG decoder, video input and output and two serial memory interfaces (SPI or xSPI). HMI tools are available from partners to support key hardware features.

The TRAVEO T2G CYT2CL series (Arm Cortex-M4F core at 160 MHz, 4 MB of embedded flash), the TRAVEO T2G CYT3DL series (Arm Cortex-M7F core at 240 MHz, 4 MB of embedded flash and 2 MB VRAM) and the TRAVEO T2G CYT4DN series (Dual Arm Cortex-M7F core at 320 MHz, 6 MB of embedded flash and 4MB VRAM) are available and can be ordered now. Engineering samples of the TRAVEO T2G CYT4EN (Dual Arm Cortex-M7F core at 320 MHz, 6 MB of embedded flash, LPDDR4 and eMMC interface) are also available.

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