OL2.JAN–pm
Can the PC market support both VL-Bus and PCI?
Or will the delay in the PCI's implementation be its death knell?
Once again, time-to-market may play judge, jury, and possibly executioner
when it comes to deciding the better of two competing technologies. This
time the lucky combatants are the Vesa Local Bus (VL-Bus) and Intel's
Peripheral Component Interconnect (PCI) architecture. And the prize?
Dominance of that heretofore innocuous gap between the PC's CPU and I/O
bus, commonly known as the local bus. This gap has suddenly been thrust in
the technological forefront because of the enormous advantages of
harnessing its ability to accelerate communication between a PC's CPU and
a peripheral device. This acceleration is achieved by bypassing the
traditional ISA/EISA I/O bus with its frustratingly slow clocking speed of
8 MHz and peak bandwidth of 16 Mbytes/s (see diagram). With a 32-bit local
bus, the peak bandwidth of a 33-MHz machine could reach up to 132
Mbytes/s. The local-bus concept itself is not new, with many designers
having already implemented ways of tapping its potential to handle the
video bottleneck created by the proliferation of OS/2 and Windows. Many
of these solutions were on display at Comdex/Fall '91 where it became
obvious that an industry standard was essential if the confusion caused by
a deluge of proprietary solutions was to be avoided. VESA promptly
responded and by Comdex/Fall '92 its VL-Bus standard was ubiquitous, with
chips available from practically every major manufacturer. Motherboards
included the Typhoon V-L Bus Master from Fortress Systems International,
Cordova, CA, with a 486DX2 running at up to 100 MHz with three VL slots on
board. VL-Bus has a lot going for it. The bus is easy to implement
because it requires no major board redesign. Further, it more than
adequately accommodates the gut-wrenching pixel transfer speeds demanded
by the PC user. Not to be overlooked is that it is the first solution
offered. The latter point may well be its greatest weapon in the face of
Intel's PCI as it allowed VL-Bus to take advantage of the groundswell of
support for a local-bus standard. Much of this support comes from vendors
desperate for a means of differentiating their products in a plateauing PC
market. Without the advantage of a preemptive strike, VL-Bus' dependence
on the 80486 bus architecture might have given PCI the edge it needed to
completely obliterate it. Despite being second to the mark, the PCI
standard cannot be ignored, with the list of official support akin to a
who's who of the computer world–the companies behind it include Compaq,
NCR, DEC, Dell, NEC, Olivetti, and of course, Intel. However, a look at
Intel's previous experience with buses–notably Multibus II–shows a
disturbing pattern. Multibus II's introduction was delayed because of
Intel's failure to unveil its message-passing coprocessor in a timely
fashion. This gave VMEbus–Multibus II's nemesis–sufficient time to
establish itself in the market–and the rest is, as they say, history. In
this case, unfortunately, history may be repeating itself. Intel again has
been beaten to the mark, this time for failing to come up with a connector
specification in time. Despite having recently introduced such a
specification (see page 00 [SPENCER'S STORY], the lead it gave VL-Bus has,
at the very least, taken away a sizable chunk of its potential market
share. A great deal now rides on its main advantage over VL-Bus, that
being processor independence. According to Mike Bailey, PCI marketing
manager at Intel, “the PCI is a specially designed multiplexing I/O bus
with auto-configuring features and a processor independence that place it
somewhere between a mezzanine bus and a local bus.” Bailey predicts that
Intel's component-level interface approach PCI will succeed in dominating
the local-bus arena by 1994. While favoring PCI, many companies have
already placed VL-Bus in their arsenal. NCR's Dan Gerst confesses this is
simply a tactical maneuver to take advantage of what was out there. In the
long run, NCR's strategy is to replace VL-Bus with PCI. The reasons are
twofold. Firstly, PCI's processor independence allows it to be on NCR's
entire line of systems, giving consistency. Secondly, PCI is 3-V ready,
making it laptop/notebook friendly. A 3-V PCI SCSI processor–the
53C810–is already available from NCR. Besides graphics and SCSI
interfaces, LANs are another targeted market for local buses–in
particular the FDDI and Fiber Channel standards which are beginning to
make tentative incursions into the LAN environment. Both of these are
capable of data transfers in excess of 100 Mbytes/s. No one doubts the
ability of PCI to take the pressure; multiple peripherals are its raison
d'etre for up to 10 devices. The VL-Bus, however, is suspect because it
was designed as a video solution. Fortress Systems' Kevin Capron claims
that the VL-Bus is more than capable of handling multiple peripherals
using the bus-mastering feature of the Typhoon V-L. He is betting his
money on VL-Bus and says that while the timing is hairy at the moment,
peripheral clocking speeds will jump to 50 MHz in the next few weeks. This
will bring the potential data transfer rate well over 100 Mbytes/s,
catapulting the humble PC to the level of the somewhat elitist
workstation. This will realize predictions that the distinction between
the workstation and the PC would someday fade. Micronics, ***, ***, is
also optimistic and has introduced a 2-slot VL-Bus board.
Where to now?
After much consideration of user requirements, many chip manufacturer's
have decided to cover all their bases and start introducing chip-sets that
support both PCI and VL-Bus. The VL-Bus has just become so well
established in the short time since its birth that PCI must be content
with the markets that VL-Bus cannot satisfy. According to Michael Harris,
Director of Sales and Marketing, Avance Logic, Inc., “the local-bus market
will divide in two–in the high end we will have PCI, while in the low end
VL-Bus will dominate as a relatively inexpensive solution”. While Avance has
plans to introduce such a chip in a matter of weeks, ATI Technologies Inc.
has already done so by adding PCI to its Mach32 accelerator and renaming
it the Mach32-AX.
–Patrick Mannion
CAPTION:
In contrast to the traditional PC architecture (a), the local-bus
architecture (b) brings the speed-critical devices of the PC directly
under the wing of the CPU, allowing much improved data-transfer speeds
while freeing more bandwidth on the regular I/O bus.
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