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Chip joins programmable-device fray

Adding another dimension to the power/unit-cost/NRE-cost/speed tradeoffs designers pore over, the Software Defined Silicon (SDS) chip from startup XMOS Semiconductor (Bristol, U.K.) is said to provide consumer electronics system engineers with the unit-cost advantage of SoCs and the flexibility of FPGAs. Based on arrays of processors, SDS devices will allow system functions that would normally be implemented in hardware to be defined in software, unifying the design flow of software and hardware.

Software Defined Silicon processors will cost about $1 each in high volume.

The chip’s event-driven multithreaded processor engine (X-Core) will deliver fast real-time response, and efficient XCore-to-XCore communications (XLink) will allow high-performance arrays of cores. Complete systems, including interfaces, are implemented in software using C-based languages and no RTL. At about $1 each in high volume, the devices are expected to cost a tenth that of an equivalent FPGA, require no NRE, and have outstanding flexibility. The devices will have 200 Mbit/s communications, Ethernet MAC and MII interfaces to Phys in software, a roughly 7 MSPS 16-tap FIR, and 500 MIPS control software performance. The company will be offering chips, software IP, and development tools, and its first product is scheduled to be announced in early 2008. For more information, visit http://www.xmos.com.

Jim Harrison

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