Clock buffers offer lowest jitter

The Si533xx is offered as the industry’s first universal clock buffers that are capable of replacing LVPECL, LVDS, CML, HCSL and LVCMOS buffers with a single IC, while eliminating the need for multiple fixed-format buffers. The family integrates common clock tree functions including clock distribution, clock muxing, clock division, format translation and level translation.

Based on a patented low-phase-noise clock driver architecture, the Si533xx family features ultra-low additive jitter (100 fs rms typical) with guaranteed maximum jitter specifications, simplifying clock tree design and providing designers more jitter margin for other devices. The parts provide a single-chip solution that replaces differential LVPECL, LVDS, CML and HCSL buffers with up to 10 outputs, LVCMOS buffers with up to 20 outputs, and discrete muxes, dividers and level translators.

Clock outputs are split into two independent banks. The signal format of each bank is user-selectable through simple pin-strapping, providing developers with an array of options. Both banks have dedicated supply voltage pins independent of the core voltage, enabling simple voltage-level translation. The devices’ universal input stage accepts two differential or single-ended inputs, and a low-noise 2:1 input mux supports glitchless switching, eliminating the risk of runt pulses being transferred to the device outputs during an input clock switch.

In addition, some Si533xx buffers support individual output enable pins for each output clock, providing control flexibility. In addition, the device’s 2:1 input mux provides more than 60 dB of noise isolation between clock inputs, significantly minimizing cross-talk-induced jitter and guaranteeing low noise operation in applications requiring two input clocks. On-chip supply voltage regulation provides high power supply noise rejection, ensuring robust low-jitter operation alongside FPGAs, ASICs, SoCs and PHYs.

The Si533xx family is supported by the Si53301/4-EVB development kit populated with a 2-input, 6-output Si53301 universal buffer/translator. This development kit can be used to evaluate the performance of all Si533xx products and is easily configured via jumpers with no external software required. ($0.80 ea/10,000 — available now)

By Christina Nickolas

Silicon Laboratories , Austin , TX
Information 512-416-8500
www.silabs.com