Clock distribution circuits save power

The STCD10x0 two-, three-, and four-channel clock buffers distribute a single master clock to multiple domains and eliminate multiple clock sources for chipsets supporting GSM, Bluetooth, WLAN, or WiMAX communications. The chips support a 10 to 52-MHz single-ended sine- or square-wave and integrate an ac input coupling capacitor.

Individual output-enable controls combine with a fast startup time to minimize power consumption, along with 2.6 mA typ quiescent and 1 µA standby current (for the four-channel STCD1040). From receipt of an enable signal, the selected channel’s output is stabilized within 50 µs from standby. The devices come in 2 x 2-mm 8-lead to 2 x 3-mm 12-lead TDFN packages and operate at –40° to 85°C. (4-channel STCD1040; $0.80 ea/10,000 — contact company for availability.)

STMicroelectronics , Lexington , MA
Information 781-861-2650
http://www.st.com