May 5, 1993 RM Micro Linear clock synchronizer.
Clock driver uses feedback to de-skew eight drivers
Feedback from remote board locations compensates for component
variations
A BiCMOS clock-generator chip from a linear-chip vendor uses separate
feedback loops for each of its eight outputs. The ML6500 programmable
adaptive clock manager runs up to 80 MHz with an external crystal. Each
of eight skew buffers is controlled by its own feedback loop (see
diagram). These loops serve to bring the clock signals at the sensed
points on the board together. Other clock drivers use digital or other
adjustment to tune separate delays. This method works fine for the
original board, but has no built-in way of compensating for temperature
drift or different components. For systems with more than eight
components to clock, another chip, the ML6508 slave clock adds eight
outputs/chip. The ML6508 can either reside at a remote part of a board or
be used on add-in boards on a bus. Both devices come in 44-pin PLCC
packages. A follow-on chip with higher clock speeds is projected. (ML6500,
$14 ea/1,000; ML6508, $13 ea/1,000–samples August.) Micro Linear Corp.
San Jose, CA Ram Gopalan 408-433-5200
CAPTION:
Each of the eight buffers in the ML6500 clock chip has its own
voltage-controlled delay element, controlled by feedback from the remote
chip it drives.
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