Clock gen exceeds jitter requirements

The PI6C557-05 clock generator is specifically designed to exceed the stringent jitter requirements of PCIe 2.0 and USB 3.0 5.0-Gbit/s data rates. The clock IC provides 2.2-ps rms phase jitter — well under the 3.1-ps requirement.

Other features include four copies of a 100- or 200-MHz HCSL or LVDS output, programmable spread-spectrum operation, a 25-MHz crystal or clock input frequency, and a supply voltage of 3.3 V ±5%. Housed in a 20-pin TSSOP package, the part operates over an industrial temperature range. ($1.05 ea/10,000 — samples now.)

Pericom Semiconductor
San Jose , CA
Information 800-435-2336
http://www.pericom.com