NXP Combines Industry’s Lowest Power Logic and Engineer’s Design Skills in their 2014 Logic Design Contest 12-17-2013
Single UART with I2C-bus/SPI interface, 128 bytes of transmit and receive FIFOs, IrDA SIR built-in support 12-05-2013
Dual UART with I²C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support 12-05-2013
Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in su 12-05-2013
Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support 12-05-2013
1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA) and XScale VLIO bus interface 12-05-2013