Recent advances in digital power control offer help for achieving high power efficiency not available with typical analog methods
BY DON CARON
CHiL Semiconductor
Tewksbury, MA
http://www.chilsemi.com
To manage power in higher-performance servers, PCs, and graphics cards, designers have typically relied on traditional analog approaches to power management. Managing, monitoring, and controlling efficiency is one of the most significant differentiating factors as IT managers struggle to rein in escalating energy costs in data centers. But managing the power for the latest low-voltage, high-frequency processors, graphic processing units (GPUs), and memory modules creates a host of new problems.
Since these CPUs transition from low to high current at rapidly rising rates, designers need to implement extremely tight and accurate power regulation to handle these fast transients. Designers using traditional analog schemes have relied heavily on techniques that require large numbers of external components in their control loop to ensure compliance.
As system performance and efficiency both continue to improve, that task has become increasingly difficult. Designers need to add more external components for a rising variety of functions from configuration issues such as selecting an operating frequency to how to start up or how to handle faults. Each additional component raises system BOM cost and increases design complexity.
Accuracy is also a growing issue. Designers of analog control loops must deal with inherent bandwidth limitations and increased latency created by low-cost analog processes and by capacitors and resistors in the feedback loop. Not long ago, power supply designers needed to deliver 3.3 V to a load at 15 A. In present systems, designers need to deliver 1 V and below at 150 A. Sensitivity to noise margins at such low voltages and high currents has forced the industry to create more accurate solutions. Furthermore, analog feedback loops are typically complex. They can require anywhere from six to ten separate, highly sensitive components and further complicate board layout.
Designers using digital controls can simply designate operating parameters, such as frequency by selecting a value from a register. Parameters are typically stored in memory so no additional components are required. Moreover, digital control circuits provide significantly better accuracy. Whereas a typical analog controller may offer tolerances as high as 15% to 25%, a digital control circuit might offer three percent accuracy, a significant improvement.
Digital limitations
Historically designers attempting to use digital instead of analog control schemes have faced two problems. The first was speed. If an output voltage goes low, an analog control loop can recognize the change and adjust the duty cycle relatively quickly. Response is limited only by the process and by the components in the feedback loop.
Digital controllers must first feed the output voltage through an A/D converter, perform processing on the digital output, and then convert the signal back to analog. Traditionally, this response has been severely limited by the A/D converter throughput.
Early controller implementations suffered from significant latency and required multiple output capacitors to compensate for that speed limitation. Managing the high-speed transients in today’s high-performance CPUs and GPUs proved exceedingly challenging.
Secondly, early digital control schemes were costly relative to analog implementations. Designed for general markets that used complex multiloop power systems, most early generation digital controllers were over-designed for PC or server applications. System designers ended up paying for silicon they did not need.
New advances
But what if you designed digital controllers specifically for servers and PC designs for PC enthusiasts? Engineers at CHiL Semiconductor recently took on this task. These new devices integrate innovative digital technology into mixed-signal multiphase synchronous buck controllers to manage core voltage and load requirements in VR11.x processors, GPUs, and memory modules. By taking advantage of these new digital control techniques, these new controllers promise to significantly boost efficiency, increase performance, reduce thermal management issues, improve monitoring and control, and reduce component count.
One way these new controllers improve power efficiency is by using an architecture comprised of up to eight interleaved synchronous buck phases. Currently available controllers typically offer four or, in a few exceptions, six phase control. By allowing designers to digitally configure the switching frequency of up to eight phases and storing those parameters in nonvolatile memory, these new devices can be used to optimize power consumption without altering external components. In addition, by spreading the power across a larger number of phases, designers can use smaller inductors, saving precious board space, and gain faster transient response. An evaluation board has an eight-phase design shown in Fig. 1 .
Fig. 1. An evaluation board with an eight-phase design helps optimize power consumption without changing external components.
But these new controllers don’t just increase the number of phases. They also add the ability to shed or turn off phases as current drops.
Moreover, a new adjustable gate drive capability allows designers to reduce MOSFET gate drive voltage in low current conditions. Using eight-phase capability for high-current conditions, and phase shedding and adjustable gate drive innovations for mid-to low current conditions, these new buck controllers are the first to offer over 90% power efficiency across virtually all load conditions.
Figure 2 shows a model of the efficiency gains from the use of phase shedding and variable gate drive in comparison to 9- and 12-V fixed-drive designs. In addition, Fig. 3 displays the measured efficiency of an eight-phase design transitioning to six phases and one phase (1.4-V output, 300-kHz operation, eight-layer 1-oz copper board).
Fig. 2. Phase shedding and variable gate drive efficiency gains are compared to fixed drive designs.
Fig. 3. Efficiency of an eight-phase design is shown transitioning to six and then one phase.
Using digital techniques, these new devices also offer a new level of power monitoring and control. Designers can now use this built-in intelligence to tune the voltage, current and clocks in each circuit to either optimize performance or maximize power efficiency. Moreover these new capabilities give designers the flexibility to trade off one design goal against the other to achieve the best solution for a particular application.
An excellent example is thermal management. Heat dissipation can play a major role in system performance and reliability. To better manage this crucial problem, these new digital multi-phase controllers add new circuit balancing algorithms that dynamically, and accurately, balance current over the controller’s phases. This function allows the designer to more easily avoid the saturation of inductors and, in the process, use lower cost external components. It also helps minimize the output voltage oscillations commonly experienced in systems using analog controllers.
Designers can achieve high power efficiency with traditional analog approaches to power management, but usually at only one load point and without meeting transient requirements, which are real-world problems. Recent advances in digital power control offer a new answer to this ongoing problem. By leveraging eight-phase control with innovative phase shedding, variable gate drive and digital monitoring techniques, high-performance PC and server designers can now meet VR11.1 tolerance and transient specifications and boost power efficiency while reducing component count and overall system cost. ■
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