Component reliability in implantable equipment

Component reliability in implantable equipment

There is disagreement about how best to ensure reliability for implantable medical devices

By GENE KELLY
International Rectifier
El Segundo, CA
http://www.irf.com

Since the malfunction of implantable medical devices can be fatal to the patient, the components used must be of the highest reliability possible. Moreover, because implantable medical devices must function for lifetimes around 5 years, devices used in such systems must be constructed with technologies that ensure a zero failure rate over the design lifetime.

Medical device manufacturers have attempted to obtain high-reliability, long-lifetime components in a variety of ways. One such way is the “upscreening” of commercial quality level parts. This involves generating a special Source Control Drawing (SCD) with various life tests and screening regimes intended to remove the “infant mortality” or early failures. Upscreening can be effective but the procedures are costly and very often the component manufacturer will not accept any liability for the screened product if the upscreening is done by a third party.

Another method is the use of custom-manufactured parts. This is very costly, as there are substantial minimum order quantities involved and such products are not available ‘off-the- shelf”. A detailed SCD must be generated and agreement from the device manufacturer must be obtained. This can be both time consuming and costly.

Solutions

The Defense Supply Center Columbus (DSCC) has generated test regimes for electronic components which are capable of providing the reliability levels required for implantable medical devices. The use of JANS-level components provides several advantages. Parts subjected to JANS level screening will have “infant mortality” failures removed, and the removal of these failures makes the remaining lot highly reliable. These devices are produced on DSCC approved process lines, which ensures repeatability and consistent procedures. Additionally, JANS devices produced by different suppliers are interchangeable. Finally, the reliability requirements for medical implantable devices are very similar to those for components used in space-based systems such as satellites, Inter-Continental Ballistic Missiles (ICBMs), and manned space vehicles. Vendors of these components have a long experience with reliability testing and can easily adapt these tests to similar requirements from the medical device community.

In addition to reliability screening, the devices must be constructed in a way that removes or minimizes the possibility of long-term failure modes from occurring. For example, the well-known phenomenon of “tin whiskers” (long crystals of elemental tin which grow from the top of a 100 percent tin plated surface, causing short circuits and leakage paths) must be avoided in all implantable devices. The usual preventative measure for tin whiskers is to use solder coatings and interconnects which have at least a three percent lead composition. Other important long-term mechanisms that limit component lifetimes include degradation of wire bond joints. The internal wire bonds at the device chip and at the package, are subject to a variety of long-term failure modes such as the development of inter-metallic compounds (if a gold wire is used with an aluminum pad). Certain inter-metallic compounds of gold and aluminum can form in the presence of silicon and the growth of these over time can result in a weakening of the joint. Total failure of the bond can occur and the resulting open circuit can be intermittent or fully open. The use of mono-metallic wire bonds (all aluminum or all gold) completely eliminates this failure mode.

If water vapor is present in the module and the device is not hermetically sealed, liquid water or vapor may eventually penetrate the device. This can result in a variety of conditions leading to complete or partial failure such as corrosion of the device metallization leading to opens and leakage paths on the surface of the device and possible chemical reactions with the package materials such as leaching of the lead from Pb-glass sealed devices. This has been shown to lead to the growth of lead dendrites between conductors leading to short circuits. To avoid these types of failures, devices must be hermetically sealed using high-quality ceramic-metal brazed joints. Passing the fine leak conditions described by MIL-STD-750 (Method 1071.8) has been shown to demonstrate immunity to failures caused by moisture ingress.

Clearly, hermetic packages are the preferred option. However, in a sealed module, plastic bodied components may also be acceptable while the devices must be designed for long-term reliability. The heart of each device is the semiconductor die itself. The die must be designed and built under conditions promoting the absolute highest quality. This means that the chip has been designed with the proper area for the power dissipation needed and oxide layers (such as MOSFET gates) are defect free and of the proper thickness. Metal layers must be of the proper purity and thickness and metal structures such as vias, metal runs are in conformance with applicable design rules. Improper design of metal runs and contacts can result in early failures. However, such design weaknesses should be spotted by the screening tests during qualification.

In addition, the wafer fabrication operations such as ion-implantation, oxidation, and thermal diffusion, cleaning and etching are properly designed and stable. This means that all wafer processing processes are under some kind of statistical control and show stability over time. One common way of characterizing such processes is the Process Capability Index (Cpk) which is a measure of how centered and stable a process is. Mathematically, it is the ratio of process width (minimum and maximum specification limits) to the actual distribution limits achieved by the process. Hence, the higher the Cpk, the better-controlled the process is. In addition, the process should be centered which means that the peak of the distribution coincides with the center value of the min/max limits. If the process is not centered, this is an indication that there may be some element of the process which is not under control and that the process could shift suddenly for no discernible reason. High Cpks (> 1.66, preferably >4.0) are an indication that the wafer fabrication operations are stable and well controlled and this also gives the benefit of high process and final yields.

The final device characteristics must be statistically “tight” meaning that standard deviations of the characteristics are small in relationship to the mean values. This is an advantage because the yield at final test is high but also demonstrates good process control. Recently, the medical electronics community have focused attention on the role of “outliers” that is, devices whose electric parameters lie more than +/- 3 sigma, from the mean. These outliers may meet all applicable electrical specifications such as leakage current but their statistical characteristics makes them suspect. For example, an outlier for breakdown voltage (Vbr) may contain some unusual anomaly which makes it susceptible to an early life failure. Prudence would dictate the removal of such a device from a test lot.

Process changes are planned and evaluated before implementation. Of course, military quality requirements such as MIL-PRF-19500 do not allow process changes to be made without re-qualification of the parts produced by the new or changed process. However, this does not mean that processes should not be continuously improved. Techniques to evaluate process change should be in use before anything is changed. An example of this is Failure Mode and Effects Analysis (FMEA), a technique whose use is highly recommended for both processes and products. Essentially, it is a careful review of all possible failures and the probability of detecting them resulting from any contemplated process or product change. The technique consists of writing down each and every possible bad result and ranking them in order of importance. Each failure mode is assigned a probability of its occurrence. One equals the “least likely” and 10 equals “most likely”. A severity ranking from 1 to 10, 10 being the most likely and the probability of detection from 1 to 10, with 10 being the least likely probability of detection, and 1 being most likely. The three scores are multiplied resulting in a total score which could range from 1 to 1000 and then the possibilities are ranked from highest to lowest by ranking the scores generated from highest to lowest. Using this technique, the most likely and most difficult to detect failure modes can be evaluated first and dealt with. Failure modes which are unlikely and easy to detect (scores of less than 100) can be dealt with after the major modes have been assessed and resolved. In this way, the process engineer can demonstrate both superior control and have improvements evaluated before any actual process changes are made.