HL10.DEC–Hitachi–rm
Controller includes microprogrammed peripheral processor
Control functions not present in silicon can be added at installation
The H8/570 16-bit microcontroller combines an H8/500 CPU with a
microprogrammed peripheral processor that runs simultaneously with it. The
resulting independent I/O subprocessor (ISP) takes the place of many
peripheral functions that might otherwise be implemented in hardware,
either as customer-specific features or as part of separate part numbers
in the MCU family. Up to 12 separate I/O functions can be programmed in
the ISP, and a simple programmable time-slice scheduler can assign
priorities and shift program flow according to external pin signals. The
control store for the ISP is a 512 x 64-bit one-time-programmable ROM on
the chip (see diagram). Code for the main processor is stored in external
memory for this version. A library of commonly used ISP functions
includes timers, counters DMA, PWM, and communications circuits. The most
common peripherals are on chip already, including eight-channel 10-bit
A/D, UART, watchdog timer, wait-state controller, and data-transfer
controller. The H8/500 CPU core does 16 x 16 multiplies and 32 x 16
divisions, allowing limited digital sdignal processing. Cycle times are
200 ns in the fastest (10-MHz) version. The part comes in a 112-pin QFP.
(10-MHz H8/570, $29.25 ea/10,000–available now.) Hitachi America, Ltd.
Brisbane, CA Information 800-285-1601, ext. 21 diagram
Literature package # M21P022 S. & I.C. Division 2000 Sierra Point Parkway
MS-080 94005-1819
CAPTION:
The H8/570 16-bit microcontroller has an independent microprogrammed I/O
subprocessor that can add controller functions not present in silicon.
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